Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference (한국전기전자재료학회:학술대회논문집)
- 2006.06a
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- Pages.3-4
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- 2006
Study of Post-silicidation Annealing Effect on SOI Substrate
SOI 기판에서 Silicide의 후속 공정 열처리 영향에 대한 연구
- Lee, Won-Jae (Chungnam National University) ;
- Oh, Soon-Young (Chungnam National University) ;
- Kim, Yong-Jin (Chungnam National University) ;
- Zhang, Ying-Ying (Chungnam National University) ;
- Zhong, Zhun (Chungnam National University) ;
- Lee, Shi-Guang (Chungnam National University) ;
- Jung, Soon-Yen (Chungnam National University) ;
- Kim, Yeong-Cheol (Korea University of Technology and Education) ;
- Wang, Jin-Suk (Chungnam National University) ;
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Lee, Hi-Deok
(Chungnam National University)
- 이원재 (충남대학교) ;
- 오순영 (충남대학교) ;
- 김용진 (충남대학교) ;
- 장잉잉 (충남대학교) ;
- 종준 (충남대학교) ;
- 이세광 (충남대학교) ;
- 정순연 (충남대학교) ;
- 김영철 (한국기술교육대학교) ;
- 왕진석 (충남대학교) ;
-
이희덕
(충남대학교)
- Published : 2006.06.22
Abstract
In this paper, a nickel silicide technology with post-silicidation annealing effect for thin film SOI devices is investigated in detail. Although lower resistivity Ni silicide can be easily obtained at low forming temperature, poor thermal stability and changing of characteristic are serious problems during the post silicidation annealing like ILD (Inter Layer Dielectric) deposition or metallization. So these effects are observed as deposited Ni thickness differently on As doped SOI (Si film 30nm). Especially, the sheet resistance of Ni thickness deposited 20nm was lower than 30nm before the post silicidation annealing. But after the post silicidation annealing, the sheet resistance was changed. Therefore, in thin film SOI MOSFETs or Ni-FUSI technology that the Si film is less than 50nm, it is important to decide the thickness of deposited Ni in order to avoid forming high resistivity silicide.