Design of a High-Performance CMOS LDO Regulator

고성능 CMOS LDO 레귤레이터 설계

  • Sim, S.M. (Dept. of Electronic Engineering, University of Incheon) ;
  • Park, J.K. (Dept. of Electronic Engineering, University of Incheon) ;
  • Kang, H.C. (Dept. of Information and Telecom, Engineering University of Incheon) ;
  • Yu, C.G. (Dept. of Electronic Engineering, University of Incheon)
  • 심상미 (인천대학교 전자공학과) ;
  • 박준규 (인천대학교 전자공학과) ;
  • 강현철 (인천대학교 정보통신학과) ;
  • 유종근 (인천대학교 전자공학과)
  • Published : 2007.10.26

Abstract

This paper describes a simple and high-performance LDO regulator designed using a $0.18{\mu}m$ CMOS process. It is designed to provide a regulated voltage for on-chip small loads instead of for off-chip heavy loads. Since the load capacitance is very small in this applications, the frequency compensation can be easily achieved without a buffer. The designed LDO drives a load current up to 15mA and dissipates only 12uA quiescent current. The line regulation is and the load regulation is for a 9mA load step. The PSRR at 10kHz is 54dB.

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