The Research of System-On-Chip Design for Railway Signal System

철도신호를 위한 단일칩 개발에 관한 연구

  • 박주열 (한양대학교 일반대학원 전자컴퓨터통신공학과, 샬롬엔지니어링(주)) ;
  • 김효상 (샬롬엔지니어링(주)) ;
  • 이준환 (샬롬엔지니어링 (주)) ;
  • 김봉택 (샬롬엔지니어링 (주)) ;
  • 정기석 (한양대학교 미디통신공학과)
  • Published : 2008.06.12

Abstract

As the railway transportation is getting faster and its operation speed has increased rapidly, its signal control has been complicated. For real time signal processing it is very important to prohibit any critical error from causing the system to malfunction. Therefore, handling complicated signals effectively while maintaining fault-tolerance capability is highly expected in modern railway transportation industry. In this paper, we suggest an SoC (Sytem-on-Chip) design method to integrate these complicated signal controlling mechanism with fault tolerant capability in a single chip. We propose an SoC solution which contains a high performance 32-bit embedded processor, digital filters and a PWM unit inside a single chip to implement ATO's, ATC's, ATP's and ATS's digital signal-processing units. We achieve an enhanced reliability against the calculation error by adding fault tolerance features to ensure the stability of each module.

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