Bottom Gate Microcrystalline Silicon TFT Fabricated on Plasma Treated Silicon Nitride

  • Huang, Jung-Jie (Department of Thin-film Transistor Technology, Display Technology Center, Industrial Technology Research Institute (DTC/ITRI)) ;
  • Chen, Yung-Pei (Department of Thin-film Transistor Technology, Display Technology Center, Industrial Technology Research Institute (DTC/ITRI)) ;
  • Lin, Hung-Chien (Department of Thin-film Transistor Technology, Display Technology Center, Industrial Technology Research Institute (DTC/ITRI)) ;
  • Yao, Hsiao-Chiang (Department of Thin-film Transistor Technology, Display Technology Center, Industrial Technology Research Institute (DTC/ITRI)) ;
  • Lee, Cheng-Chung (Department of Thin-film Transistor Technology, Display Technology Center, Industrial Technology Research Institute (DTC/ITRI))
  • Published : 2008.10.13

Abstract

Bottom-gate microcrystalline silicon thin film transistors (${\mu}c$-Si:H TFTs) were fabricated on glass and transparent polyimide substrates by conventional 13.56 MHz RF plasma enhanced chemical vapor deposition at $200^{\circ}C$. The deposition rate of the ${\mu}c$-Si:H film is 24 nm/min and the amorphous incubation layer near the ${\mu}c$-Si:H/silicon nitride interface is unobvious. The threshold voltage of ${\mu}c$-Si:H TFTs can be improved by $H_2$ or $NH_3$ plasma pretreatment silicon nitride film.

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