Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference (한국전기전자재료학회:학술대회논문집)

The Korean Institute of Electrical and Electronic Material Engineers (한국전기전자재료학회)
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Effect of heat treatment in $HfO_2$ as charge trap with engineered tunnel barrier for nonvolatile memory

비휘발성 메모리 적용을 위한 $SiO_2/Si_3N_4/SiO_2$ 다층 유전막과 $HfO_2$ 전하저장층 구조에서의 열처리 효과

  • Park, Goon-Ho (Department of Electronic materials engineering, Kwangwoon Univ.) ;
  • Kim, Kwan-Su (Department of Electronic materials engineering, Kwangwoon Univ.) ;
  • Jung, Myung-Ho (Department of Electronic materials engineering, Kwangwoon Univ.) ;
  • Jung, Jong-Wan (Department of Nano Science and Technology, Sejong Univ.) ;
  • Chung, Hong-Bay (Department of Electronic materials engineering, Kwangwoon Univ.) ;
  • Cho, Won-Ju (Department of Electronic materials engineering, Kwangwoon Univ.)
  • Published : 2008.11.06
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Abstract

The effect of heat treatment in $HfO_2$ as charge trap with $SiO_2/Si_3N_4/SiO_2$ as tunnel oxide layer in capacitors has been investigated. Rapid thermal annealing (RTA) were carried out at the temperature range of 600 - $900^{\circ}C$. It is found that all devices carried out heat treatment have large threshold voltage shift Especially, device performed heat treatment at $900^{\circ}C$ has been confirmed the largest memory window. Also, Threshold voltage shift of device used conventional $SiO_2$ as tunnel oxide layer was smaller than that with $SiO_2/Si_3N_4/SiO_2$.

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