Residual stress on nanocrystalline silicon thin films deposited with substrate biasing at low temperature

  • Lee, Hyoung-Cheol (Dept. of Advanced Materials Engineeing, Sungkyunkwan University) ;
  • Kim, In-Kyo (Sungkyun Advanced Institute of Nano Technology(SAINT), Sungkyunkwan University) ;
  • Yeom, Geun-Young (Dept. of Advanced Materials Engineeing, Sungkyunkwan University)
  • Published : 2009.10.12

Abstract

Nanocrystalline silicon thin films were deposited using an internal-type inductively coupled plasma-chemical vapor deposition at room temperature by varying the bias power to the substrate and the structural characteristics of the deposited thin film were investigated. The result showed that the crystalline volume fraction was decreased with the increase of bias power. At the low bias power range of 0~60 W, the compress stress in the deposited thin film was in the range of -34 ~ -77 Mpa which is generally lower than the residual stress observed for the nanocrystalline silicon thin films deposited by capacitively coupled plasma.

Keywords