Proceedings of the Korea Information Processing Society Conference (한국정보처리학회:학술대회논문집)

  • 2012.11a
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  • Pages.42-45
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  • 2012
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  • 2005-0011(pISSN)
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  • 2671-7298(eISSN)
Korea Information Processing Society (한국정보처리학회)
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Code Generation and Optimization for the Flow-based Network Processor based on LLVM

  • Lee, SangHee (School of Electrical and Computer Engineering, Korea University) ;
  • Lee, Hokyoon (School of Electrical and Computer Engineering, Korea University) ;
  • Kim, Seon Wook (School of Electrical and Computer Engineering, Korea University) ;
  • Heo, Hwanjo (Net. Computing Convergence Research Team, ETRI) ;
  • Park, Jongdae (Net. Computing Convergence Research Team, ETRI)
  • Published : 2012.11.22
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Abstract

A network processor (NP) is an application-specific instruction-set processor for fast and efficient packet processing. There are many issues in compiler's code generation and optimization due to NP's hardware constraints and special hardware support. In this paper, we describe in detail how to resolve the issues. Our compiler was developed on LLVM 3.0 and the NP target was our in-house network processor which consists of 32 64-bit RISC processors and supports multi-context with special hardware structures. Our compiler incurs only 9.36% code size overhead over hand-written code while satisfying QoS, and the generated code was tested on a real packet processing hardware, called S20 for code verification and performance evaluation.

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