Polycrystalline Silicon Thin Film Transistor Fabrication Technology

다결정 실리콘 박막 트랜지스터 제조공정 기술

  • 이현우 (현대전자산업주식회사, 반도체 연구소) ;
  • 전하응 (현대전자산업주식회사, 반도체 연구소) ;
  • 우상호 (현대전자산업주식 회사, 반도체 연구소) ;
  • 김종철 (현대전자산업주식회사, 반도체 연구소) ;
  • 박현섭 (현 대전자산업주식회사, 반도체 연구소) ;
  • 오계환 (현대전자산업주식회사, 반도체 연구소)
  • Published : 1992.02.01

Abstract

To use polycrystalline Si Thin Film Transistor (poly-Si TFT) in high density SRAM instead of High Load Resistor (HLR), TFT is needed to show good electrical characteristics such as large carrier mobility, low leakage current, high driver current and low subthreshold swing. To satisfy these electrical characteristics, the trap state density must be reduced in the channel poly. Technological issues pertinent to the channel poly fabrication process are investigated and discussed. They are solid phase growth (SPG), Si-ion implantation, laser annealing and hydrogenation. The electrical properties of several CVD oxides used as the gate oxide of TFT are compared. The dependence of the electrical characteristics of TFT on source-drain ion-implantation dose, drain offset length and dopant lateral diffusion are also described.

Keywords