The Developments of State CHDL and Two-Level Minimizer for State Machine Synthesizer

상태합성기(State Machine Synthesizer) 설계를 위한 상태 CHDL 개발 및 Two-level minimizer 개발에 관한 연구

The state machine synthesizer is widely used to FSM synthesis. In this paper, we developed the state machine description language "state CHDL" such as IF, THEN, ELSE, SWITCH, CASE statements. Also, an algorithm for efficient state minimization and two level minimizer of FSM and graphical user interface-pin map window, supporting the designer with input-ouput effency, are presented.