Hot Electron Induced Input offset Voltage Modeling in CMOS Differential Amplifiers

Hot electron에 의한 CMOS 차동증폭기의 압력 offset 전압 모델링

This paper presents one of the first comprehensive studies of how hot electron degradation impacts the input offset voltage of a CMOS differential amplifiers. This study utilizes the concept of a virtual source-coupled MOSFET pair in order to evaluate offset voltaged egradation directly from individual device measurement. Next, analytical models are developed to describe the offset voltage degradation. These models are used to examine how hot electron induced offset voltage is affected with the device parameters.