Performance Evaluation of the New DRAM Architectures in Multiprogramming Environment

멀티프로그래밍 환경에서의 새로운 DRAM 구조의 성능 분석

  • 안태원 (서울대학교 전자공학과) ;
  • 정덕균 (서울대학교 전자공학과) ;
  • 민상렬 (서울대학교 컴퓨터공학과) ;
  • 최윤호 (삼성전자 반도체연구소)
  • Published : 1994.06.01

Abstract

In the design of modern computer systems, the speed gap between the CPUs and DRAMs has been a major concern. To relieve this problem at a low cost, several new DRAM architectures have been proposed. This study is aimed at evaluating quantitatively the impact of the new DRAM architectures (synchronous DRAM. dual-RAS synchronous DRAM, and enhanced DRAM) on the memory system performance. We developed a cache and memory simulator and performed various experiments using the traces generated from four benchmark programs. The simulation results show that the new DRAM architectures offer a better performance than a conventional one by 5~30% in a low cost system and their improvement in a high performance system is less than 1%. However, for resonable multiprogramming workoads, additional performance improvement of about 10~28% is expected in a high performance system while 1~3% in a low cost system.

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