Development of Peripheral Units of the 16 bit Micro-Controller for Mobile Telecommunication Terminal

이동통신 단말기용 16 비트 마이크로콘트롤러의 주변장치 개발

  • 박성모 (전남대학교 컴퓨터공학과) ;
  • 이남길 (전남대학교 전자공학과) ;
  • 김형길 (전남대학교 전자공학과) ;
  • 김세균 (전남대학교 전자공학과)
  • Published : 1995.09.01

Abstract

The trend of compact size, light weight, low power consumption in the portable telecommunication equipments demands large scale integration and low voltage operation of chips and the minimization of the number of the components in the telecommunication terminal. According to the trend, existing chip components are modulized and are integrated as a part into a bigger chip. This paper is about the development of the peripheral units of micro-controller for mobile telecommunication terminal. Peripherals consist of DMA controller, Interrupt controller, timer, watchdog timer, clock generator, and power management unit. They are designed to be integrated with EU(Execution Unit) and BIU(Bus Interface Unit) into a 16 bit micro-controller which will be used as a core of an ASIC for next generation digital mobile telecommunication terminal. At first, whole block of the micro-controller was described by VHDL behavioral model and simulated to verify its overall operation. Then, watchdog timer, clock generator and power management unit were directly synthesized by using VHDL synthesis tool. Rest of the pheriperal units were designed and simulated by using Compass Design Tool.

Keywords