Journal of the Korean Institute of Telematics and Electronics A (전자공학회논문지A)

The Institute of Electronics and Information Engineers (대한전자공학회)
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The development of a tool for PLD Design with device fitting

Device fitting이 고려된 PLD 설계용 Tool 개발

  • 원충상 (충주공업대학교 컴퓨터공학과) ;
  • 김희석 (청주대학교 전자공학과)
  • Published : 1995.10.01
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Abstract

This paper describes a development of the PLD design tool in considering with a device fitting. To design digital circuit with PLDs, several steps in the developed PLD design tool are needed such as Boolean description step, pin map step, FUSE map and JEDEC steps ... etc. Especially, we have considered the device fitting to design large digital circuits with PLDs developed the device fitting algorithms based on the PLD device fitting and compared with the results of a another PLD design tool(PALASM). Also, we have proved that the developed PLD design tool is successfully implemented by the connection with a PLD writer(ALL-07), in the case of design digital circuits.

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