참고문헌

1. Solid State Technology Flex-Mount Polishing of Silicon Wafers Bonora, A.C.
2. Silicon Processing for the VLSI Era-Volume 1: Process Technology Wolf, S.;Tauber, R.N.
3. Semiconductor International CMP: Suppliers Integrating, Applications Spreading Burggraaf, P.
4. IEDM Technical Digest v.89 A new Planarization Technique, Using a Combination of RIE and Chemical Mechnical Polish(CMP) Davari, B.
5. Semiconductor International Planarization by CMP : Forcasting the Future O'Mara, W.C.
6. Journal of Electronic Materials v.25 Review of Planarization and Reliability Aspects of Future Interconnect Materials Sethuraman, A.R.;Wang, J.F.;Cook, L.
7. Journal of Electronic Materials v.27 no.10 Mechanical Processes in Chemical-Mechanical Planarization: Plasticity Effects in Oxide Thin Films K. Rajan