DOI QR코드

DOI QR Code

Void Defects in Composite Titanium Disilicide Process

복합 티타늄실리사이드 공정에서 발생한 공극 생성 연구

  • Cheong, Seong-Hwee (Department of Materials Science and Engineering, The University of Seoul) ;
  • Song, Oh-Sung (Department of Materials Science and Engineering, The University of Seoul)
  • 정성희 (서울시립대학교 신소재공학과) ;
  • 송오성 (서울시립대학교 신소재공학과)
  • Published : 2002.11.01

Abstract

We investigated the void formation in composite-titanium silicide($TiSi_2$) process. We varied the process conditions of polycrystalline/amorphous silicon substrate, composite $TiSi_2$ deposition temperature, and silicidation annealing temperature. We report that the main reason for void formation is the mass transport flux discrepancy of amorphous silicon substrate and titanium in composite layer. Sheet resistance in composite $TiSi_2$ without patterns is mainly affected by silicidation rapid thermal annealing (RTA) temperature. In addition, sheet resistance does not depend on the void defect density. Sheet resistance with sub-0.5 $\mu\textrm{m}$ patterns increase abnormally above $850^{\circ}C$ due to agglomeration. Our results imply that $sub-750^{\circ}C$ annealing is appropriate for sub 0.5 $\mu\textrm{m}$ composite X$sub-750_2$ process.

Keywords

References

  1. J.S. Byun, D.H. Kim, and W.S.Kim, H.J.Kim, J. Appl. Phys., 78(3), 1725 (1995) https://doi.org/10.1063/1.360201
  2. R.T. Tung, Applied Surface Science, 117/118, 268 (1997) https://doi.org/10.1016/S0169-4332(97)80092-X
  3. H. Zhang, J. Poole, R. Eller and M.Keefe, J. Vac. Sci. Technol. A, 17(4), 1904 (1999) https://doi.org/10.1116/1.581702
  4. Y. Akasaka, K. Miyano, K. Nakajima, M. Takahasi, S. Tanaka, and K. Suguro, Jpn. J. Appl. Phys., 38(4B), 2385 (1999) https://doi.org/10.1143/JJAP.38.2385
  5. M. Sekiguchi, M. Yamanaka, T. Fuji, M. Fukumato, and S. Mayumi, J. Electrochem. Soc., 144(1), (1997)
  6. J. Lutze, G. Scott, and M. Manley, IEEE Electron Device Letters., 21(4), 155 (2000) https://doi.org/10.1109/55.830966
  7. H. Fang, M.C. Oztu, E.G. Seebauer, D.E. Batchelor, Journal of the Electrochemical Society, 146(11), 4240 (1999) https://doi.org/10.1149/1.1392621
  8. J.P. Gambino, E.G. Colgan, A.G. Domenicucci, and B. Cunningham, J. Electrochem. Soc., 145(4), (1998)
  9. C.Y. Kang, D.G. Kang, and J.W. Lee, Journal of Applied Physics, 86, 5293 (1999) https://doi.org/10.1063/1.371513
  10. H.S. Kim, D.H. Ko, D.L. Base, Kazuyuki Fujihara, and H.K. Kang, IEEE Electron Device Letters, 20(2), 86 (1999) https://doi.org/10.1109/55.740660
  11. J. Lasky, J.S. Nakos, O.J. Cain, and P.J. Geiss, IEEE Trans. Electron Device, 38, 262 (1991) https://doi.org/10.1109/16.69904
  12. I. Raaijmakers and K.B. Kim, J. Appl. Phys., 67(10), 6255 (1990) https://doi.org/10.1063/1.345141
  13. D.G. Ong, Modern MOS Technology:Process, Devices, and Design, McGraw-Hill, New York (1984)
  14. K. Holloway and R. Sinclair, J. Appl. Phys., 61(4), 1359 (1987) https://doi.org/10.1063/1.338114
  15. T.P. Nolan, R. Sinclair, and R. Beyers, J. Appl. Phys., 7, 720 (1992) https://doi.org/10.1063/1.351333
  16. S. Nygren, M. Ostling, S.D. Peterson, H. Norstrom, K.H. Ryden, R. Bushta, and C. Chatfield, Thin Solid Films, 168, 325 (1989) https://doi.org/10.1016/0040-6090(89)90016-3