References
- PowerRater(Hynix In-house RTL Power Estimat) 김기선;안태균
- CoverRater(Hynix In-house RTL & Gate-level Code Coverage Analyzer) 김기선;안태균
- IEEE Trans. VLSI System v.3 Architectural Power Analysis: The Dual Bit Type Method P.E.Landman;J.M.Rabaey
- International Conference on Computer-Aided Disign Register-Transfer Level Estimation Techniques for Switching Activity and Power Comsumption A.Raghunathan;S.Dey;N.K.Jha
- International Conference on Computer-Aided Disign Statistical Sampling and Regression Analysis for RT-Level Power Evaluation C.T.Hsieh;Q.Wu.;C.S.Ding;M.Pedram
- IEEE Trans. VLSI Systems Cycle-Accurate Marco-Models for RT-Level Power Analysis Q.Wu;Q.Qiu;M.Pedram;C.S.Ding
- Design Automation Conference A Power Macromodeling Technique Based on Power Sensitivity Z.Chen;K.Roy
- International Conference on Computer-Aided Design A Power Modeling and Characterization Method for Macrocells Using Structure Information J.Y.Lin;W.Z.Shen;J.Y.Jou
- International Symposium on Circuits and Systems A New Cost Model for High-Level Power Optimization and its Application T.Ahn;K.Choi;K.H.Kim;S.K.Hong
- PCALC(Hynix In-house Gate-level Power Estimation Tool) 한상열