대한전자공학회논문지TC (Journal of the Institute of Electronics Engineers of Korea TC)

대한전자공학회 (The Institute of Electronics and Information Engineers)
권호 표지

1.8GHz 고주파 전단부의 결함 검사를 위한 새로운 BIST 회로

A New Fault-Based Built-In Self-Test Scheme for 1.8GHz RF Front-End

  • 류지열 (에리조나주립대학 전기공학과) ;
  • 노석호 (안동대학교 전자공학과)
  • Ryu Jee-Youl (Department of Electrical Engineering, Arizona State University) ;
  • Noh Seok-Ho (Major of Electronic Engineering, College of Electronic & Information Engineering, Andong National University)
  • 발행 : 2005.06.01
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초록

본 논문에서는 1.8GHz 고주파 수신기 전단부의 결함 검사를 위한 새로운 저가의 BIST 회로(자체내부검사회로) 및 설계기술을 제안한다. 이 기술은 입력 임피던스 매칭 측정 방법을 이용한다. BIST 블록과 고주파 수신기의 전단부는 0.25m CMOS 기술을 이용하여 단일 칩 위에 설계되었다. 이 기술은 측정이 간단하고 비용이 저렴하며, BIST 회로가 차지하는 면적은 고주파 전단부가 차지하는 전체면적의 약 $10\%$에 불과하다.

This paper presents a new low-cost fault-based Built-In Self-Test (BIST) scheme and technique for 1.8GHz RF receiver front end. The technique utilizes input impedance matching measurement. The BIST block and RF receiver front end are designed using 0.25m CMOS technology on a single chip. The technique is simple and inexpensive. The overhead of the BIST circuit is approximately $10\%$ of the total area of the RF front end.

키워드

참고문헌

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