JSTS:Journal of Semiconductor Technology and Science

The Institute of Electronics and Information Engineers (대한전자공학회)
권호 표지

A Novel Adaptive Biasing Scheme for CMOS Op-Amps

  • Kurkure Girish (Department of Electrical 'Engineering' Indian Institute of Technology) ;
  • Dutta Aloke K. (Department of Electrical 'Engineering' Indian Institute of Technology)
  • Published : 2005.09.30
Download PDF
⟨ Previous Next ⟩

Abstract

In this paper, we present a new adaptive biasing scheme for CMOS op-amps. The designed circuit has been used in an Operational Transconductance Amplifier (OTA) with ${\pm}1$ V power supply, and it has improved the positive and negative slew rates from 2.92 V/msec to 1242 V/msec and from 1.56 V/msec to 133 V/msec respectively, while maintaining all the small-signal performance parameter values the same as that without adaptive biasing (as expected), however, there was a marginal decrease of the dynamic range. The most useful features of the proposed circuit are that it uses a very low number of components (thus not creating severe area penalty) and requires only 25 nW of extra stand-by power.

Keywords

References

  1. J. M. Shin and K. S. Yoon, 'Design of a Programmable Slew Rate Op-Amp,' Proc. of the 37th Midwest Symp.Circ. & Syst., LA, vol. 1, pp. 142-146, August 1995 https://doi.org/10.1109/MWSCAS.1994.519209
  2. B.W. Lee and B.J. Sheu, 'A High Slew Rate CMOS Amplifier for Analog Signal Processing,' IEEE J. Solid-St. Circ., vol. SC-25, no. 3, pp. 885-889, June 1990 https://doi.org/10.1109/4.102692
  3. M. G. Degrauwe, J. Rijmenants, E.A. Vittoz, and H. J. DeMan, 'Adaptive Biasing CMOS Amplifiers,' IEEE J. Solid-St. Circ., vol. SC-17, no. 3, pp. 522-528, June 1982 https://doi.org/10.1109/JSSC.1982.1051769
  4. B. J. Blalock and P. E. Allen, 'A Low-Voltage, Bulk-Driven MOSFET Current Mirror for CMOS Technology,' Proc. IEEE Int. Symp. Circ. & Syst., Seattle, pp. 1972-1975, May 1995 https://doi.org/10.1109/ISCAS.1995.523807
  5. S. Baswa, A. J. Lopez-Martin, R. G. Carvajal, and J. Ramirez-Angulo, 'Low-Voltage Power Efficient Adpative Biasing for CMOS Amplifiers and Buffers,' Electron. Lett., vol. 40, no. 4, pp. 217-219, February 2004 https://doi.org/10.1049/el:20040191
  6. G. Ferri, 'Low-Voltage Low-Power Adaptive Biased High-Efficiency Integrated Amplifiers,' 8th IEEE Int. Conf. Elect., Circ., & Syst. (ICECS), vol. 3, pp. 1529-1532, 2001 https://doi.org/10.1109/ICECS.2001.957506
  7. G. C. Cardarilli and G. Ferri, 'CMOS Adaptive Biasing Circuits for Low-Power Applications,' Proc. 21st Int. Conf. Microelect., vol. 2, pp. 14-17 and 747-750, September 1997 https://doi.org/10.1109/ICMEL.1997.632952
  8. G. C. Cardarilli and G. Ferri, 'Dynamic Biased Topologies for Low Power Bipolar Application,' Euro. Conf. Circ. Theory & Des. (ECCTD), Budapest, pp. 1438-1441,August-September 1997
  9. G. Giustolisi, G. Palmisano, and T. Segreto, '1.2 V CMOS Op-Amp with a Dynamically Biased Output Stage,' IEEE J. Solid-St. Circ., vol. SC-35, no. 4, pp. 632-636, April 2000 https://doi.org/10.1109/4.839923
  10. '$T-Spice^{TM}$ User Guide and Reference,' Tanner EDA, Pasadena, 1998
  11. W. Liu, 'MOSFET Models for SPICE Simulation, Including BSIM3v3 and BSIM4,'Wiley, Britain, 2001
  12. J. Ramirez-Angulo and M. Holmes, 'Simple Technique Using Local CMFB to Enhance Slew Rate and Bandwidth of One-Stage CMOS Op-Amps,' Electron.Lett., vol. 38, no. 23, pp. 1409-1411, November 2002 https://doi.org/10.1049/el:20020764