ETRI Journal

Electronics and Telecommunications Research Institute (한국전자통신연구원)
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Pipelined Scheduling of Functional HW/SW Modules for Platform-Based SoC Design

  • Received : 2005.01.12
  • Published : 2005.10.31
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Abstract

We developed a pipelined scheduling technique of functional hardware and software modules for platform-based system-on-a-chip (SoC) designs. It is based on a modified list scheduling algorithm. We used the pipelined scheduling technique for a performance analysis of an MPEG4 video encoder application. Then, we applied it for architecture exploration to achieve a better performance. In our experiments, the modified SoC platform with 6 pipelines for the 32-bit dual layer architecture shows a 118% improvement in performance compared to the given basic SoC platform with 4 pipelines for the 16-bit single-layer architecture.

Keywords

References

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