Moisture Induced Hump Characteristics of Shallow Trench-Isolated nMOSFET

Shallow Trench Isolation 공정에서 수분에 의한 nMOSFET의 Hump 특성

  • 이영철 (목포해양대학교 해양전자통신공학부)
  • Published : 2006.12.30

Abstract

In this parer, hump characteristics of short-channel nMOSFETs induced by moistures of the ILD(inter-layer dielectric) layer in the shallow trench isolation (STI) process are investigated and the method for hump suppression is proposed Using nMOSFETs with various types of the gate and a measurement of TDS-APIMS (Thermal Desorption System-Atmospheric Pressure ionization Mass Spectrometry), hump characteristics were systematically analyzed and the systemic analysis based hump model was presented; the ILD layer over poly-Si gate of nMOSFET generates moistures, but they can't diffuse out of the SiN layer due to the upper SiN layer. Consequently, they diffuses into the edge between the gate and STI and induces short-channel hump. In order to eliminate moisture in the ILD layer by out-gassing method, the annealing process prior to the deposition of the SiN layer was carried out. As the result, short-channel humps of the nMOSFETs were successfully suppressed.

본 논문은 shallow trench isolation (STI) 공정에서 ILD (inter-layer dielectric) 막의 수분에 의해 야기되는 단 채널 (short-channel) nMOSFET의 hump 특성의 원인을 분석하고 억제 방법을 제안하였다. 다양한 게이트를 가지는 소자와 TDS-APIMS(Thermal Desorption System-Atmospheric Pressure Ionization Mass Spectrometry) 측정을 이용하여 hump 특성을 체계적으로 분석하였고, 분석을 바탕으로 단 채널 hump모델을 제안하였다. 제안된 모델에 의한 단 채널 nMOSFET의 hump 현상은 poly-Si 게이트 위의 ILD 막의 수분이 상부의 SiN 막에 의해 밖으로 확산되지 못하고 게이트와 STI의 경계면으로 확산하여 발생한 것이 며, 이를 개선하기 위해 상부의 SiN 막의 증착 전 열공정을 통해 ILD 막의 수분을 효과적으로 배출시킴으로써 hump 특성을 성공적으로 억제하였다.

Keywords

References

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