Journal of the Institute of Electronics Engineers of Korea SD (대한전자공학회논문지SD)

The Institute of Electronics and Information Engineers (대한전자공학회)
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An Efficient Interconnect Test Pattern Generation Algorithm for Crosstalk Faults

Crosstalk 고장 점검을 위한 효과적인 연결선 테스트 패턴 생성 알고리즘에 관한 연구

  • Han, Ju-Hee (Department of Computer Science & Engineering, Hanyang University) ;
  • Song, Jae-Hoon (Department of Computer Science & Engineering, Hanyang University) ;
  • Yi, Hyun-Bean (Department of Computer Science & Engineering, Hanyang University) ;
  • Kim, Jin-Kyu (Department of Computer Science & Engineering, Hanyang University) ;
  • Park, Sung-Ju (Department of Computer Science & Engineering, Hanyang University)
  • 한주희 (한양대학교 컴퓨터공학과) ;
  • 송재훈 (한양대학교 컴퓨터공학과) ;
  • 이현빈 (한양대학교 컴퓨터공학과) ;
  • 김진규 (한양대학교 컴퓨터공학과) ;
  • 박성주 (한양대학교 전자컴퓨터공학부)
  • Published : 2007.12.25
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Abstract

The effect of crosstalk errors is most significant in high-performance circuits. This paper presents effective test patterns for SoC and Board level interconnects considering actual effective aggressors. Initially '6n' algorithm, where 'n' is the total number of interconnect nets, is analyzed to detect and diagnose 100% crosstalk faults. Then, more efficient algorithm is proposed reducing the number of test patterns significantly while maintaining complete crosstalk fault coverage.

고성능의 칩을 설계함에 있어 연결선 사이의 크로스토크 고장은 무시할 수 없는 요인이 되었다. 본 논문에서는 칩 및 보드레벨에서의 연결선 테스트를 위한 효과적인 테스트 패턴 알고리즘을 제시한다. 크로스토크 고장 점검율이 100%인 기존 6n 알고리즘을 분석하고 실질적으로 크로스토크 영향을 주는 net를 고려하여 보다 적은 패턴으로 동일한 고장 점검율을 얻는 새로운 알고리즘을 제안한다.

Keywords

References

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