Journal of the Korean Institute of Electrical and Electronic Material Engineers (한국전기전자재료학회논문지)

The Korean Institute of Electrical and Electronic Material Engineers (한국전기전자재료학회)
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Thermal Process Effects on Grain Size and Orientation in (Bi1La1)4Ti3O12 Thin Film Deposited by Spin-on Method

스핀 코팅법으로 증착한 (Bi1La1)4Ti3O12 박막의 후속 열공정에 따른 입자 크기 및 결정 방향성 변화

  • 김영민 (충북대학교 신소재공학과) ;
  • 김남경 (㈜하이닉스반도체 메모리연구소) ;
  • 염승진 (㈜하이닉스반도체 메모리연구소) ;
  • 장건익 (충북대학교 신소재공학과) ;
  • 류성림 (충주대학교 신소재공학과/ReSEM) ;
  • 선호정 (군산대학교 신소재.나노화학공학부) ;
  • 권순용 (충주대학교 신소재공학과/ReSEM)
  • Published : 2007.07.01
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Abstract

A 16 Mb 1T1C FeRAM device was integrated with BLT capacitors. But a lot of cells were failed randomly during the measuring the bit-line signal distribution of each cell. The reason was revealed that the grain size and orientation of the BLT thin film were severely non-uniform. And the grain size and orientation were severely affected by the process conditions of post heat treatment, especially nucleation step. The optimized annealing temperature at the nucleation step was $560^{\circ}C$. The microstructure of the BLT thin film was also varied by the annealing time at the step. The longer process time showed the finer grain size. Therefore, the uniformity of the grain size and orientation could be improved by changing the process conditions of the nucleation step. The FeRAM device without random bit-fail cell was successfully fabricated with the optimized BLT capacitor and the sensing margin in bit-line signal distribution of it was about 340 mV.

Keywords

References

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