Journal of the Korea Institute of Information and Communication Engineering (한국정보통신학회논문지)

The Korea Institute of Information and Commucation Engineering (한국정보통신학회)
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A FPGA Implementation of Stream Cipher Algorithm Dragon

Dragon스트림 암호 알고리즘의 하드웨어 구현

  • 김헌욱 (동서대학교 유비쿼터스 IT학과) ;
  • 황기현 (동서대학교 컴퓨터정보공학부) ;
  • 이훈재 (동서대학교 컴퓨터정보공학부)
  • Published : 2007.09.29
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Abstract

Dragon Stream Cipher is proposed for software base implementation in the eSTREAM project. Now this stream cipher is selected as a phase 3 focus candidate. Dragon is a new stream cipher contructed using a single word based NIFSR(non-linear feed back shift register) and 128/256 key/IV(Initialization Vector). Dragon is the keystream generator that produce 64bits of keystream. In this paper, we present an implementation of Drag(m stream cipher algorithm in hardware. Finally, the implementation is on Altera FPGA device, EP3C35F672I and the timing simulation is done on Altera's Quartus II. A result of 111MHz maximum clock rate and 7.1Gbps is throughput is obtained from the implementation.

Dragon 스트림 암호 알고리즘은 현재 ECRYPT 프로젝트의 일부인 eSTREAM에 참여하여 소프트웨어 분야(Profile 1)의 Phase 1, 2단계를 통과하여 Phase 3단계에 등록된 상태이다. Dragon은 기존의 스트림 암호와 달리 한 개의 워드(32비트)단위의 NLFSR(non-linear feedback shift register)을 사용하고, 128/256 비트의 key와 IV(Initialization Vector)를 입력받아 64비트의 키 수열을 생성하는 키 수열 발생기(Keystream Generator)이다. 본 논문에서는 Dragon 스트림 암호 알고리즘을 Altera사의 Quartus II툴을 이용하여 Cyclone III FPGA 소자(EP2C35F672I8)에 구현 및 타이밍 시뮬레이션을 하였고, 그 결과 111MHz에서 7.1Gbps의 처리량을 보였다.

Keywords

References

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  2. The eSTREAM web site. 'eSTREAM, ECRYPT Stream Cipher Project,' http://www.ecrypt.eu.org/st ream
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