The Design and Fabrication of CMOS LNA through De-embedded Verification of the Spiral Inductor

나선형 인덕터의 디임베드 검증을 통한 CMOS LNA 설계 및 제작

  • 이한영 (대림대학 전자정보통신계열) ;
  • 유영길 (대림대학 전자정보통신계열)
  • Published : 2008.12.01

Abstract

This paper examined the simulation results after applying not only spiral inductor's 3D EM simulation but also de-embedding technique to reduce the pad's RF effects. When calculating standard deviation with measurement results not only the gain at 0.5GHz${\sim}$4GHz but also noise figure at 1.8GHz${\sim}$4GHz, the simulation results includes de-embedded inductor' model improved gain deviation by 0.171 and noise figure deviation by 0.151 than the results from simulation with foundry inductor equivalent circuit models.

Keywords

References

  1. T. Manku, "Microwave CMOS-devices and circuits," Proc. Of the IEEE 1998. Custom integrated Circuits Conference, pp59-66
  2. Behzad Razavi, RF Microelectronics, by Prentice Hall, Inc
  3. "RF MOS Measurement," by Franz Sischka and Thomas Gneiting, World Scientific
  4. "Layout Rules for GHz-Probing," Application Note from Cascade Micro tech
  5. "Harmonica Reference Volume," User's Manual of Serenade 8.71 from Ansoft Corporation
  6. "Harmonica Element Libray," User's Manual of Serenade 8.71 from Ansoft Corporation
  7. Thomas H. Lee., "The Design of CMOS Radio Frequency Integrated Circuits," Cambridge University Press, 1998
  8. Gray and Meyer, Analysis and Design of Analog Integrated Circuits, 4thed. New York: Wiley, 2001
  9. A van der Ziel, Noise in Solid State Devices and Circuits, Wiley, NewYork, 1986
  10. Hyunjin Lee, Joonho Gil, Jeong-hu Han, and Hyungcheol Shin, "Optimization of spiral inductors on silicon substrate," IDEC Conference 2002 Summer, pp. 49-52. 2002
  11. Derek K. Shaeffer and Thomas H. Lee., "A 1.5V,1.5GHz CMOS Low Noise Amplifier," IEEE Journal of Solid-State Circuit, vol. 32, no.5, pp.745-747, May., 1997 https://doi.org/10.1109/4.568846