Journal of the Institute of Electronics Engineers of Korea TC (대한전자공학회논문지TC)

The Institute of Electronics and Information Engineers (대한전자공학회)
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Quantization Performances and Iteration Number Statistics for Decoding Low Density Parity Check Codes

LDPC 부호의 복호를 위한 양자화 성능과 반복 횟수 통계

  • Seo, Young-Dong (Dept. of Control and Instrumentation Engineering, Wonkwang University) ;
  • Kong, Min-Han (Dept. of Electrical, Electronic and Information Engineering, Wonkwang University) ;
  • Song, Moon-Kyou (Dept. of Electrical, Electronic and Information Engineering, Wonkwang University)
  • 서영동 (원광대학교 제어계측공학과) ;
  • 공민한 (원광대학교 전기전자및정보공학부) ;
  • 송문규 (원광대학교 전기전자및정보공학부)
  • Published : 2008.02.25
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Abstract

The performance and hardware complexity of LDPC decoders depend on the design parameters of quantization, the clipping threshold $c_{th}$ and the number of quantization bits q, and also on the maximum number of decoding iterations. In this paper, the BER performances of LDPC codes are evaluated according to the clipping threshold $c_{th}$ and the number of quantization bits q through the simulation studies. By comparing the quantized Min-Sum algorithm with the ideal Min-Sum algorithm, it is shown that the quantized case with $c_{th}=2.5$ and q=6 has the best performance, which approaches the idea case. The decoding complexities are calculated and the word error rates(WER) are estimated by using the pdf which is obtained through the statistical analyses on the iteration numbers. These results can be utilized to tradeoff between the decoding performance and the complexity in LDPC decoder design.

LDPC 복호기의 성능과 하드웨어 복잡도는 양자화 과정의 설계 변수인 클리핑 임계치(clipping threshold) $c_{th}$와 양자화 비트 수 q, 그리고 복호과정의 최대 반복 횟수에 의존한다. 본 논문에서는 이상적인 Min-Sum 알고리즘과 양자화된 Min-Sum 알고리즘을 비교하기 위해서 시뮬레이션을 통해 클리핑 임계치 $c_{th}$와 양자화 비트 수 q에 따른 LDPC 부호의 비트 오율 성능을 평가하였다. 시뮬레이션 결과 클리핑 임계치 $c_{th}=2.5$, 양자화 비트 수 q=6일 경우에 이상적인 Min-Sum 알고리즘에 가장 근접한 비트 오율이 나타남을 확인할 수 있었다. 또한 반복 횟수의 통계적 분석을 통한 반복 횟수의 확률 밀도 함수를 이용하여 q와 반복 횟수에 따른 복호 복잡도를 계산하고, 부호어 에러율(word error rate; WER) 성능을 추정하였다. 이상의 결과는 LDPC 복호기 설계에서 부호의 성능과 복호 복잡도 사이의 절충을 위해 사용될 수 있다.

Keywords

References

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