Analysis of a Synchronizing PLL System for Single-phase Grid-tie Inverters

단상 그리드연결형 인버터의 동기화를 위한 PLL 시스템 해석

  • 트란콴빈 (울산대 대학원 전기공학과) ;
  • 전태원 (울산대 전기전자정보시스템공학부) ;
  • 이홍희 (울산대 전기전자정보시스템공학부) ;
  • 김흥근 (경북대 전자전기공학부) ;
  • 노의철 (부경대 전기제어계측공학부)
  • Published : 2008.12.20

Abstract

In the paper, the product-type PLL system, which is so suitable for synchronizing a single phase grid voltage is designed. The PLL system is modelled with the small signal analysis. Both the cut-off frequency of low pass filter and the optimal gain are derived by considering the transient response for synchronization as well as a distortion of synchronization signal. Through the simulation studies and experimental results, the transient response and ripple component of synchronization signal are investigated with a variation of both the cut-off frequency and gain in order to verify the performance of design.

본 논문은 단상 그리드전압의 동기화에 가장 적합한 곱형 PLL 시스템을 설계한다. 소신호 해석방법으로 PLL 시스템을 모델링하고, 동기 과도 응답특성뿐만 아니라 동기신호의 왜곡을 고려하여 저역필터의 차단주파수 및 이득의 최적 값을 유도한다. 설계의 성능을 검증하기 위하여, 시뮬레이션 및 실험결과로 차단주파수 및 이득의 변화에 동기신호의 과도응답과 리플성분을 관찰한다.

Keywords

References

  1. F.M.Gardner, Phase Lock Techniques, New York : Wiley, 1979
  2. T. Timbus, M. Liserres, R. Teodorescu, and F. Blaabjerg, "Synchronization Methods for Three Phase Distributed Power Generation Systems, An Overview and Evaluation", Conf. Rec. of IEEE-PESC, pp. 2474-2481, 2005
  3. S. K. Chung, "Phase-Locked Loop for Grid-connected Three-phase Power Conversion Systems", IEE Proc.-Electr. Power Appl., Vol. 147, No. 3, pp. 213-219, 2000, May https://doi.org/10.1049/ip-epa:20000328
  4. X. Yuan, W. Me, and J. Allmeling, "Stationary-Frame Generalized Integrators for Current Control of Active Power Filters With Zero Steady-State Error for Current Harmonics of Concern Under Unbalanced and Distorted Operation Conditions", IEEE Trans. Ind. Appl., Vol. 38, No. 2, pp. 523-532, 2002, Mar./Apr https://doi.org/10.1109/28.993175
  5. R. I.Bojoi, G. Griva, V. Bostan, M. Guerriero, F. Farina, and F. Profumo, "Current Control Strategy for Power Conditioners Using Sinusoidal Signal Integrators in Synchronous Reference Frame", IEEE Trans. Power Elect., Vol. 20, No. 6, pp. 1402-1412, 2005, Nov
  6. R. Y. Kim, S. Y. Choi, and I. Y. Suh, "Instantaneous Control of Average Power for Grid Tie Inverter Using Phase D-Q Rotating Frame with PLL Pass Filter", in Proc. IEEE-IECON, pp. 274-279, 2004
  7. R. M. S. Filho, P. F. Seixas, P. C. Cortizo, A. B. Torres, and A. F. Souza, "Comparsion of Three Single-Phase PLL Algorithms for UPS Applications", IEEE Trans. Ind. Elect., Vol. 55, No. 8, pp. 2923-2932, 2008, Aug https://doi.org/10.1109/TIE.2008.924205
  8. S. M. Silva, B. M. Lopes, B.J.F, R. P. Campana, and W. C. Boaventura, "Performance Evaluation of PLL Algorithms for Single-phase Grid-connected Systems", Conf. Rec, of IEEE-IAS, pp. 2259-2263, 2004
  9. L.G.B. Rolim, D.R. Costa, and M. Aredes, "Analysis and Software Implementation of a Robust Synchronizing PLL Circuit Based on the pq Theory", IEEE Trans. Ind. Elect., Vol. 53, No. 6, pp. 1919-1926, 2006, Dec https://doi.org/10.1109/TIE.2006.885483