전자공학회논문지SC (Journal of the Institute of Electronics Engineers of Korea SC)

대한전자공학회 (The Institute of Electronics and Information Engineers)
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전하 펌프의 전류 부정합 감소를 위한 피드포워드 방식

A Feed-forward Method for Reducing Current Mismatch in Charge Pumps

  • 이재환 (전북대학교 전자정보공학부) ;
  • 정항근 (전북대학교 전자정보공학부)
  • Lee, Jae-Hwan (Division of Electronics & Information Engineering, Chonbuk National University) ;
  • Jeong, Hang-Geun (Division of Electronics & Information Engineering, Chonbuk National University)
  • 발행 : 2009.01.25
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초록

전하 펌프의 전류 부정합은 위상 고정 루프의 주파수 성분에 기준 스퍼를 발생시킴으로써 특성을 떨어뜨리게 한다. 전류 부정합은 캐스코드 출력단과 같이 전하 펌프의 출력 저항을 높여줌으로써 감소시킬 수 있다. 그러나 공급 전압이 낮아짐에 따라 트랜지스터를 쌓기 힘들어지게 된다. 본 논문에서는 전류 부정합을 줄이기 위한 새로운 방법을 제안하였다. 제안한 방법은 출력 단의 채널 길이 변조에 의한 전류 변화를 피드포워드 방식으로 보상해 주는 것이다. 새로운 방법에 대한 시뮬레이션은 CMOS $0.18{\mu}m$ 공정을 이용하였다.

Current mismatch in a charge pump causes degradation in spectral purity of the phase locked loops(PLLs), such as reference spurs. The current mismatch can be reduced by increasing the output resistance of the charge pump, as in a cascoded output stage. However as the supply voltage is lowered, it is hard to stack transistors. In this paper, a new method for reducing the current mismatch is proposed. The proposed method is based on a feed-forward compensation for the channel length modulation effect of the output stage. The new method has been demonstrated through simulations on typical $0.18{\mu}m$ CMOS circuits.

키워드

참고문헌

  1. H. Arora, N. Klemmer, J. C. Morizio, and P. D. Wolf, 'Enhanced phase noise modeling of fractional-N frequency synthesizers,' IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 52, no. 2, pp. 379-395, Feb. 2005 https://doi.org/10.1109/TCSI.2004.841594
  2. W. Rhee, Bang-Sup Song, Akbar Ali, 'A 1.1-GHz CMOS fractional-N frequency synthesizer with a 3-b third-order $\Delta$$\Sigma$ modulator,' IEEE J. Solid-State Circuits, vol. 35, no. 10, pp. 1453-1460, Oct. 2000 https://doi.org/10.1109/4.871322
  3. Young-Shig Choi, Dae-Hyun Han, 'Gain- boosting charge pump for current matching in phase-locked loop' IEEE Trans. Circuits Syst. II, Express Briefs, vol. 53, no. 10, pp. 1022-1025, Oct. 2006 https://doi.org/10.1109/TCSII.2006.882122
  4. Jae-Shin Lee, Min-Sun Keel, Shin-Il Lim and Suki Kim, 'Charge pump with perfect current matching characteristics in phase-locked loops,' Electronics Letters, vol. 36, pp. 1907-1908, Nov. 2000 https://doi.org/10.1049/el:20001358
  5. A. Waizman, 'A delay line loop for frequency synthesis of deskewed clock,' ISSCC Digest of Technical Papers, 1994