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A Low-Power Register File with Dual-Vt Dynamic Bit-Lines driven by CMOS Bootstrapped Circuit

  • Lee, Hyoung-Wook (School of Electrical Engineering, Seoul National University) ;
  • Lee, Hyun-Joong (School of Electrical Engineering, Seoul National University) ;
  • Woo, Jong-Kwan (School of Electrical Engineering, Seoul National University) ;
  • Shin, Woo-Yeol (School of Electrical Engineering, Seoul National University) ;
  • Kim, Su-Hwan (School of Electrical Engineering, Seoul National University)
  • Published : 2009.09.30

Abstract

Recent CMOS technology scaling has seriously eroded the bit-line noise immunity of register files due to the consequent increase in active bit-line leakage currents. To restore its noise immunity while maintaining performance, we propose and evaluate a $256{\times}40$-bit register file incorporating dual-$V_t$ bit-lines with a boosted gate overdrive voltage in 65 nm bulk CMOS technology. Simulation results show that the proposed bootsrapping scheme lowers leakage current by a factor of 450 without its performance penalty.

Keywords

References

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