Journal of information and communication convergence engineering

  • 제8권2호
  • /
  • Pages.197-200
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  • 2010
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  • 2234-8255(pISSN)
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  • 2234-8883(eISSN)
한국정보통신학회 (The Korea Institute of Information and Commucation Engineering)
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Design of Temperature Stable FLL Circuit

  • Choi, Jin-Ho (Department of Embedded IT, Pusan University of Foreign Studies)
  • 투고 : 2010.02.02
  • 심사 : 2010.03.24
  • 발행 : 2010.04.30
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초록

The FLL(frequency locked loop) circuit is used to generate an output signal that tracks an input reference signal. The locking time of FLL is short compared to PLL(phase locked loop) circuit because the output signal of FLL is synchronized only in frequency. Also the FLL is designed to allow the circuit to be fully integrated. In this paper, the temperature stable FLL circuit is designed by using full CMOS transistors. When the temperature is varied from $-20^{\circ}C$ to $70^{\circ}C$, the variation of output frequency is about from -2% to 1.6% from HSPICE simulation results.

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참고문헌

  1. Alan B. Grebene, Bipolar and MOS analog integrated circuit design, Wiley-Interscience, 1984.
  2. R. E. Best, Phase-Locked Loops: Theory, Design and Applications, New York:McGraw-Hill, 1984.
  3. Sidney Soclof, Applications of analog integrated circuits, Prentice-hall, 1985.
  4. Zhang, C. and Makinwa, K.A.A ,"Interface Electronics for a CMOS Electrothermal Frequency-Locked-Loop," Proceedings of Solid State Circuit Conference, pp. 292-295, 2007.
  5. Jin Ho Choi, "Design of Frequency Locked Loop Circuit," The Korea Institute of Maritime Information & Communication, pp.275-278, 2008.
  6. A. Djemouai, M. Sawan and M. Slamani, "New Circuit Techniques Based on a High Performance Frequency-to-Voltage Conversion," Proceedings of IEEE Int. Conf. Electronics Circuits and Systems, pp. 13-16, 1999.
  7. Jin-Ho Choi, "Temperature Dependent Characteristics Analysis of FLL Circuit," The Korea Institute of Maritime Information & Communication, vol. 7, no. 1, pp. 62-65, March 2009.