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A Study of the Memory Characteristics of Al2O3/Y2O3/SiO2 Multi-Stacked Films with Different Tunnel Oxide Thicknesses

터널 산화막 두께에 따른 Al2O3/Y2O3/SiO2 다층막의 메모리 특성 연구

  • Jung, Hye Young (Department of Materials Science and Engineering, Yonsei University) ;
  • Choi, Yoo Youl (Department of Materials Science and Engineering, Yonsei University) ;
  • Kim, Hyung Keun (Department of Materials Science and Engineering, Yonsei University) ;
  • Choi, Doo Jin (Department of Materials Science and Engineering, Yonsei University)
  • Received : 2012.05.04
  • Accepted : 2012.08.22
  • Published : 2012.11.30

Abstract

Conventional SONOS (poly-silicon/oxide/nitride/oxide/silicon) type memory is associated with a retention issue due to the continuous demand for scaled-down devices. In this study, $Al_2O_3/Y_2O_3/SiO_2$ (AYO) multilayer structures using a high-k $Y_2O_3$ film as a charge-trapping layer were fabricated for nonvolatile memory applications. This work focused on improving the retention properties using a $Y_2O_3$ layer with different tunnel oxide thickness ranging from 3 nm to 5 nm created by metal organic chemical vapor deposition (MOCVD). The electrical properties and reliabilities of each specimen were evaluated. The results showed that the $Y_2O_3$ with 4 nm $SiO_2$ tunnel oxide layer had the largest memory window of 1.29 V. In addition, all specimens exhibited stable endurance characteristics (program/erasecycles up to $10^4$) due to the superior charge-trapping characteristics of $Y_2O_3$. We expect that these high-k $Y_2O_3$ films can be candidates to replace $Si_3N_4$ films as the charge-trapping layer in SONOS-type flash memory devices.

Keywords

References

  1. M. H. White, D. A. Adams, and J. Bu, "On the Go with SONOS," IEEE Circuit. Dev. Magazine, 16 [4] 22-31 (2000). https://doi.org/10.1109/101.857747
  2. Z. Tang, Y. Xia, H. Xu, J. Yin, Z. Liu, A. Li, X. Liu, F. Yan, and X. Jic, "Charge Trapping Memory Characteristics of p- Si/Ultrathin $Al_2O_3/(HfO_2)_{0.8}(Al_2O_3)_{0.2}/Al_2O_3/Metal$ Multilayer Structure," Electrochem. Solid-State Lett., 14 [2] G13-G16 (2011). https://doi.org/10.1149/1.3518706
  3. T. S. Chen, K. H. Wu, H. Chung, and C. H. Kao, "Performance Improvement of SONOS Memory by Bandgap Engineering of Charge-Trapping Layer," IEEE Electron Device Lett., 25 [4] 205-7 (2004). https://doi.org/10.1109/LED.2004.825163
  4. Z. Tang and Z. Liu, "Progress of High-k Dielectrics Applicable to SONOS-Type Nonvolatile Semiconductor Memories," Trans. Electr. Electron. Mater., 11 [4] 155-65 (2010). https://doi.org/10.4313/TEEM.2010.11.4.155
  5. H. W. You, S. M. Oh, and W. J. Cho, "Thickness Dependence of High-k Materials on the Characteristics of MAHONOS Structured Charge Trap Flash Memory," Thin Solid Films, 518 [22] 6460-4 (2010). https://doi.org/10.1016/j.tsf.2010.02.055
  6. T. M. Pan and W. W. Yeh , "High Performance High K $Y_2O_3$ SONOS-Type Flash Memory," IEEE Trans. Electron Devices, 55 [9] 2354-60 (2008). https://doi.org/10.1109/TED.2008.927401
  7. J. J. Chambers and G. N. Parsons, "Physical and Electrical Characterization of Ultrathin Yttrium Silicate Insulators on Silicon," J. Appl. Phys., 90 [2] 918-33 (2001). https://doi.org/10.1063/1.1375018
  8. J. Kwo, M. Hong, A. R. Kortan, K. L. Queeney, Y. J. Chabal, R. L. Opila, Jr., D. A. Muller, S. N. G. Chu, B. J. Sapjeta, T. S. Lay, J. P. Mannaerts, T. Boone, H. W. Krautter, J. J. Krajewski, A. M. Sergnt, and J. M. Rosamilia, "Properties of High K Gate Dielectrics $Gd_2O_3$ and $Y_2O_3$ for Si," J. Appl. Phys., 89 [7] 3920-27 (2001). https://doi.org/10.1063/1.1352688
  9. S. K. Sung, I. H. Park, C. J. Lee, Y. K. Lee, J. D. Lee, B. G. Park, S. D. Chae, and C. W. Kim, "Fabrication and Program/ Erase Characteristics of 30-nm SONOS Nonvolatile Memory Devices," IEEE Trans. Nanotechnol., 2 [4] 258-64 (2003). https://doi.org/10.1109/TNANO.2003.820779
  10. Y. N. Yeo, Y. Q. Wang, S. K. Samanta, W. J. Yoo, G. Samudra, D. Gao, and C. C. Chong, "Simulation of Trapping Properties of High k Material as the Charge Storage," Thin Solid Films, 504 [1] 209-12 (2006). https://doi.org/10.1016/j.tsf.2005.09.126
  11. W. C. Wang, M. Badylevich, V. V. Afanas'ev, A. Stesmans, C. Adelmann, S. V. Elshocht, J. A. Kittl, M. Lukosius, C. Walczyk, and C. Wenger "Injection and Trapping of Electrons in $Y_2O_3$ Layers on Si," IOP Conf. Ser.: Mater. Sci. Eng., 8 012028 (2010). https://doi.org/10.1088/1757-899X/8/1/012028
  12. T. M. Pan and W. W. Yeh, "A High-k $Y_2O_3$ Charge Trapping Layer for Nonvolatile Memory Application," Appl. Phys. Lett., 92 173506 (2008). https://doi.org/10.1063/1.2919086
  13. M. T. Wu, H. T. Lue, K. Y. Hsieh, R. Liu, and C. Y. Lu, "Study of the Band-to-Band Tunneling Hot-Electron (BBHE) Programming Characteristics of p-Channel Bandgap-Engineered SONOS (BE-SONOS)," IEEE Trans. Electron Devices, 54 [4] 699-706 (2007) https://doi.org/10.1109/TED.2007.891250
  14. J. Robertson, "High Dielectric Constant Gate Oxides for Metal Oxide Si Transistors," Rep. Prog. Phys., 69 [2] 327-96 (2006) https://doi.org/10.1088/0034-4885/69/2/R02
  15. P. Samanta, T. Y. Man, A. C. K. Chan, Q. Zhang, C. Zhu, and M. Chan, "Experimental Evidence of Two Conduction Mechanisms for Direct Tunnelling Stress-induced Leakage Current Through Ultrathin Silicon Dioxide Gate Dielectrics," Semicond. Sci. Technol., 21 [10] 1393-401 (2006). https://doi.org/10.1088/0268-1242/21/10/004
  16. International Technology Roadmap for Semiconductor (ITRS), pp. 46-47, 2011.