Journal of Power Electronics

The Korean Institute of Power Electronics (전력전자학회)
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Modified Digital Pulse Width Modulator for Power Converters with a Reduced Modulation Delay

  • Received : 2011.07.01
  • Accepted : 2011.10.27
  • Published : 2012.01.20
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Abstract

This paper presents a digital pulse width modulator (DPWM) with a reduced digital modulation delay (a transport delay of the modulator) during the transient response of power converters. During the transient response operation of a power converter, as a result of dynamic variations such as load step-up or step-down, the closed loop controller will continuously adjust the duty cycle in order to regulate the output voltage. The larger the modulation delays, the larger the undesired output voltage deviation from the reference point. The three conventional DPWM techniques exhibit significant leading-edge and/or trailing-edge modulation delays. The DPWM technique proposed in this paper, which results in modulation delay reductions, is discussed, experimentally tested and compared with conventional modulation techniques.

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References

  1. P. J. Sun and L. W. Zhou, "Duty ratio predictive control scheme for digital control of dc-dc switching converters," Journal of Power Electronics, Vol. 11, No. 2, pp. 156-162, Mar. 2011. https://doi.org/10.6113/JPE.2011.11.2.156
  2. J. H. Kim, J. G Lim, and S. K. Chung, Y. J. Song, "Dsp-based digital controller for multi-phase synchronous buck converters," Journal of Power Electronics, Vol. 9, No. 3, pp. 410-417, May 2009.
  3. A. Prodic, D. Maksimovic, and R. W. Erickson, "Design and implementation of a digital PWM controller for a high-frequency switching DC-DC power converter," in The 27th Annual Conference of the IEEE Industrial Electronics Society, IECON '01, Vol. 2, pp. 893-898, 2001.
  4. A. Syed, E. Ahmed, D. Maksimovic, and E. Alarcon, "Digital pulse width modulator architectures,"in IEEE 35th Annual Power Electronics Specialists Conference, PESC 04, Vol. 6, pp. 4689- 4695, 2004.
  5. V. Yousefzadeh, and D. Maksimovic, "Sensorless optimization of dead times in DC-DC converters with synchronous rectifiers," IEEE Trans. Power Electron., Vol. 21, No. 4, pp. 994-1002, Jul. 2006. https://doi.org/10.1109/TPEL.2006.876850
  6. L. Corradini, P. Mattavelli, E. Tedeschi, and D. Trevisan, "Highbandwidth multisampled digitally controlled DC-DC converters using ripple compensation," IEEE Trans. Ind. Electron., Vol. 55, No. 4, pp. 1501-1508, Mar. 2008. https://doi.org/10.1109/TIE.2008.917144
  7. C. Sudhakarababu and M. Veerachary, "Dsp based control of interleaved boost converter," Journal of Power Electronics, Vol. 5, No. 3, pp. 180-189, Jul. 2005.
  8. T. Nussbaumer, M. L. Heldwein, G. Gong, S. D. Round, and J. W. Kolar, "Comparison of prediction techniques to compensate time delays caused by digital control of a three-phase buck-type PWM rectifier system," IEEE Trans. Ind. Electron., Vol. 55, No. 2, pp. 791-799, Feb. 2008. https://doi.org/10.1109/TIE.2007.909061
  9. L. Peng, Y. Kang, X. Pei, and J. Chen, "A novel PWM technique in digital control," IEEE Trans. Ind. Electron., Vol. 54, No. 1, pp. 338-346, Jan. 2007. https://doi.org/10.1109/TIE.2006.885135
  10. Y. F. Chan, M. Moallem, and W. Wang, "Design and implementation of modular fpga-based pid controllers," IEEE Trans. Ind. Electron., Vol. 54, No. 4, pp. 1898-1906, Apr. 2007. https://doi.org/10.1109/TIE.2007.898283
  11. L. Guo, J. Y. Hung, and R. M. Nelms, "Evaluation of dsp-based pid and fuzzy controllers for dc-dc converters," IEEE Trans. Ind. Electron., Vol. 56 , No. 6, pp. 2237-2248, Jun. 2009. https://doi.org/10.1109/TIE.2009.2016955
  12. J. A. A. Qahouq, and V. Arikatla, "Power converter with digital sensorless adaptive voltage positioning control scheme," IEEE Trans. Ind. Electron., Vol. 58, No. 9, pp. 4105-4116, Sep. 2011. https://doi.org/10.1109/TIE.2010.2098366
  13. B. Miao, R. Zane, and D. Maksimovic, "Automated digital controller design for switching converters," in 36th IEEE Power Electronics Specialists Conference, PESC '05, pp. 2729-2735, 2005.
  14. A. V. Peterchev, and S. R. Sanders, "Quantization resolution and limit cycling in digitally controlled PWM converters," IEEE Trans. Power Electron., Vol. 18. No. 1, pp. 301-308, Jan. 2003. https://doi.org/10.1109/TPEL.2002.807092
  15. Z. Jianlong, M. Xikui, and D. Changqing, "Asymmetrical oscillations in digitally controlled power-factor-correction boost converters," IEEE Trans. Circuits and Syst. II, Vol. 56, No. 3, pp. 230-234, Mar. 2009 https://doi.org/10.1109/TCSII.2008.2011597
  16. V. Yousefzadeh, T. Takayama, and D. Maksimovi, "Hybrid dpwm with digital delay-locked loop," in IEEE Workshop on Computers in Power Electronics, COMPEL '06, pp. 142-148, 2006.
  17. W. Qiu, G. Miller, and Z. Liang, "Dual-edge pulse width modulation scheme for fast transient response of multiple-phase voltage regulators," in IEEE Power Electronics Specialists Conference, pp. 1563-1569, 2007.
  18. M. He, and J. Xu, "Nonlinear pid in digital controlled buck converters," in IEEE Applied Power Electronics Conference, Vol. 2, pp. 1461-1465, 2007.
  19. P.-L. Wong and F. C. Lee, "Switching action delays in voltage regulator modules," in IEEE Power Electronics Specialists Conference, Vol. 2, pp. 675-678, 2002.
  20. D. S. Sha, Z. Q. Guo, and X. Z. Liao, "Digital control strategy for input-series-output-parallel modular dc/dc converters," Journal of Power Electronics, Vol. 10, No. 3, pp. 245-250, May 2010. https://doi.org/10.6113/JPE.2010.10.3.245
  21. A. V. Peterchev, Jinwen Xiao, and S. R. Sanders, "Architecture and ic implementation of a digital vrm controller," IEEE Trans. Power Electron., Vol. 18, No. 1, pp. 356-364, Jan. 2003. https://doi.org/10.1109/TPEL.2002.807099

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