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Performance Improvement of Virtualization Sensitive Instruction Emulation by Instruction Decoding at Compile Time

컴파일 시간 명령어 디코딩을 통한 가상화 민감 명령어 에뮬레이션 성능 개선

  • Shin, Dong-Ha (Division of Computer Science, Sangmyung University) ;
  • Yun, Kyung-Un (Department of Computer Science, the Graduate School, Sangmyung University)
  • 신동하 (상명대학교 컴퓨터과학부) ;
  • 윤경언 (상명대학교 일반대학원 컴퓨터과학과)
  • Received : 2011.11.14
  • Accepted : 2011.12.04
  • Published : 2012.02.29

Abstract

Recently, we have seen several implementations that virtualize the ARM architecture. Since the current ARM architecture is not possible to be virtualized using the traditional technique called "trap-and-emulation", we usually detect all virtualization sensitive instructions during the run-time of a guest kernel and emulate them virtually rather than executing them directly. The emulation for virtualization is usually implemented either by binary translation or interpretation. Our research is about how to improve the performance of emulation for virtualization based on interpretation. The interpretation usually requires a few steps: instruction fetching, instruction decoding and instruction executing. In this paper, we propose a method that decodes all virtualization sensitive instructions during the compilation time of a guest kernel and reduces the time required for interpretation during the run time of the guest kernel. Our method provides both implementation simplicity and performance improvement of emulation for virtualization based on interpretation.

최근 들어 ARM 구조에서 가상화를 구현하기 위해 다양한 연구들이 진행되었다. 현재의 ARM 구조는 전통적인 에뮬레이션 방법인 "trap-and-emulation"으로 가상화 할 수 없기 때문에, 게스트 커널 수행 시간에 가상화 민감 명령어를 탐지하여, 이를 직접 수행하는 대신 가상화 에뮬레이션 한다. 일반적으로 가상화 에뮬레이션은 이진 변환 또는 인터프리테이션 방법으로 구현한다. 본 연구는 인터프리테이션 방법을 기반으로 하는 가상화 에뮬레이션의 성능 향상에 관한 것이다. 인터프리테이션은 명령어 페치, 명령어 디코딩, 그리고 명령어 수행의 단계로 이루어진다. 본 논문에서는 게스트 커널의 컴파일 시간에 모든 가상화 민감 명령어를 디코딩하여, 게스트 커널의 수행 시간에 인터프리테이션 시간을 줄이는 방법을 제안한다. 본 연구의 방법은 인터프리테이션 기반의 가상화 방법에서 에뮬레이션 코드를 간단하게 하고, 에뮬레이션 성능을 향상시킨다.

Keywords

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