Journal of the Korea Society of Computer and Information (한국컴퓨터정보학회논문지)

Korean Society of Computer Information (한국컴퓨터정보학회)
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Design of High-Speed Parallel Multiplier with All Coefficients 1's of Primitive Polynomial over Finite Fields GF(2m)

유한체 GF(2m)상의 기약다항식의 모든 계수가 1을 갖는 고속 병렬 승산기의 설계

  • 성현경 (상지대학교 컴퓨터정보공학부)
  • Received : 2012.11.29
  • Accepted : 2013.02.12
  • Published : 2013.02.28
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Abstract

In this paper, we propose a new multiplication algorithm for two polynomials using primitive polynomial with all 1 of coefficient on finite fields GF($2^m$), and design the multiplier with high-speed parallel input-output module structure using the presented multiplication algorithm. The proposed multiplier is designed $m^2$ same basic cells that have a 2-input XOR gate and a 2-input AND gate. Since the basic cell have no a latch circuit, the multiplicative circuit is very simple and is short the delay time $D_A+D_X$ per cell unit. The proposed multiplier is easy to extend the circuit with large m having regularity and modularity by cell array, and is suitable to the implementation of VLSI circuit.

본 논문에서는 유한체 GF($2^m$)상에서 모든 항에 0이 아닌 계수가 존재하는 기약 다항식을 이용한 두 다항식에 대한 승산 알고리즘을 제시하였으며, 제시된 승산 알고리즘을 이용하여 고속의 병렬 입-출력 모듈구조의 승산기를 설계하였다. 제시한 승산기의 구성은 $m^2$개의 동일한 기본 셀들로 설계되었으며, 제시한 기본 셀은 2입력 XOR 게이트와 2입력 AND 게이트로 구성하였다. 셀에 래치를 사용하지 않았으므로 회로가 간단하며, 셀당 지연시간이 $D_A+D_X$이다. 본 연구에서 제안한 승산기는 규칙성과 셀 배열에 의한 모듈성을 가지므로 m이 큰 회로의 확장이 용이하며 VLSI회로 실현에 적합할 것이다.

Keywords

References

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