한국재료학회지 (Korean Journal of Materials Research)

  • 제24권4호
  • /
  • Pages.186-193
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  • 2014
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  • 1225-0562(pISSN)
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  • 2287-7258(eISSN)
한국재료학회 (Materials Research Society of Korea)
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Cu Seed Layer의 열처리에 따른 전해동도금 전착속도 개선

Improvement of Electrodeposition Rate of Cu Layer by Heat Treatment of Electroless Cu Seed Layer

  • 권병국 (부산대학교 차세대전자기판회로학과) ;
  • 신동명 (부산대학교 나노소재공학과) ;
  • 김형국 (부산대학교 차세대전자기판회로학과) ;
  • 황윤회 (부산대학교 차세대전자기판회로학과)
  • Kwon, Byungkoog (Department of Advanced Circuit Interconnection, Pusan National University) ;
  • Shin, Dong-Myeong (Department of Nanomaterials Engineering, & BK21 PLUS Nano Convergence Technology Division, Pusan National University) ;
  • Kim, Hyung Kook (Department of Advanced Circuit Interconnection, Pusan National University) ;
  • Hwang, Yoon-Hwae (Department of Advanced Circuit Interconnection, Pusan National University)
  • 투고 : 2013.12.27
  • 심사 : 2014.04.04
  • 발행 : 2014.04.27
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초록

A thin Cu seed layer for electroplating has been employed for decades in the miniaturization and integration of printed circuit board (PCB), however many problems are still caused by the thin Cu seed layer, e.g., open circuit faults in PCB, dimple defects, low conductivity, and etc. Here, we studied the effect of heat treatment of the thin Cu seed layer on the deposition rate of electroplated Cu. We investigated the heat-treatment effect on the crystallite size, morphology, electrical properties, and electrodeposition thickness by X-ray diffraction (XRD), atomic force microscope (AFM), four point probe (FPP), and scanning electron microscope (SEM) measurements, respectively. The results showed that post heat treatment of the thin Cu seed layer could improve surface roughness as well as electrical conductivity. Moreover, the deposition rate of electroplated Cu was improved about 148% by heat treatment of the Cu seed layer, indicating that the enhanced electrical conductivity and surface roughness accelerated the formation of Cu nuclei during electroplating. We also confirmed that the electrodeposition rate in the via filling process was also accelerated by heat-treating the Cu seed layer.

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참고문헌

  1. R. Schwerz, B. Boehme, M. Roellig, K. -J. Wolter and N. Meyendorf, in Proceeding of the Electronic Components and Technology Conference (Las Vegas, NV, May 2013). p.1243.
  2. H. Azimi, Microelectronic packaging substrates: future challenges, The Intel Corporation On the Web. Retrieved March 17, 2014 from http://imapsaz.org.
  3. J. Fjelstad, The PC design Magazine on HDI Technology (May 2013), p. 10.
  4. J. Seo, J. Lee and Y. Won (in Korean), Clean technology, 17(2), 103 (2011).
  5. X. Cui, D. A. Hutt and P. P. Conway, Thin Solid Films, 520, 6095 (2012). https://doi.org/10.1016/j.tsf.2012.05.068
  6. D. L. Smith, Thin-film Deposition: Principles and Practice, 1st ed., McGraw-Hill, NY (1996).
  7. T. Sun, B. Yao and A. P. Warren, Phys. Rev. B 81, 155454 (2010). https://doi.org/10.1103/PhysRevB.81.155454
  8. S. Nakahara, C. Y. Mak and Y. Okinaka, J. Electrochem. Soc., 140, 533 (1993). https://doi.org/10.1149/1.2221082
  9. H. D. Liu, Y. P. Zhao, G. Ramanath, S. P. Murarka and G. C. Wang, Thin Solid Films, 384, 151 (2001). https://doi.org/10.1016/S0040-6090(00)01818-6
  10. B. Chin, P. Ding, B. Sun, T. Chiang, D. Angelo and I. Hashim, Solid State Technol., 141 (1998).
  11. J. O, S. Lee, J. -B. Kim and C. Lee, J. Kor. Phys. Soc., 39, S472 (2001).
  12. T. Kobayashi, J. Kawasaki, K. Mihara, T. Yamashita and H. Honma, J. Jpn. Inst. Electron. Pack., 3, 324 (2000). https://doi.org/10.5104/jiep.3.324
  13. T. Kobayashi, J. Kawasaki, K. Mihara and H. Honma, Electrochim. Acta, 47, 85 (2001). https://doi.org/10.1016/S0013-4686(01)00592-8
  14. W. Dow, M. Y. Yen, S. Z. Liao, Y. D. Chiu and H. C. Huang, Electrochim. Acta, 53, 8228 (2008). https://doi.org/10.1016/j.electacta.2008.06.042