Journal of the Korea Institute of Information and Communication Engineering (한국정보통신학회논문지)

The Korea Institute of Information and Commucation Engineering (한국정보통신학회)
권호 표지
DOI QR코드

DOI QR Code

Design of Synchronized Power Control Embedded System Based on Core-A Platform

Core-A 플랫폼을 이용한 동기형 전력제어 임베디드 시스템 설계

  • Lee, Woo-Kyung (Department of Information and Communication Engineering, Hoseo University) ;
  • Moon, Dai-Tchul (Department of Information and Communication Engineering, Hoseo University)
  • Received : 2014.02.24
  • Accepted : 2014.04.14
  • Published : 2014.06.30
Download PDF
⟨ Previous Next ⟩

Abstract

This paper realize power control embedded system with one master of Core-A 32-bit RISC processor and several slaves controling power with synchronized digital signals. Core-A platform is consisted of Core-A processor, AMBA bus, SSRAM, AC97, DMA, UART, GPIO etc. Slave is made by both digital part and analog part. The former generates various power control patterns synchronized with master signal. The latter converts 220V power proportional to 4 bit digital signals. design of Embedded system is executed in Flowrian II, in which software is cross-compiled and hardware is verified by simulation. Embedded system is implemented in FPGA board and CPLD chips as well as PCB board for analog power control.

본 논문은 마스터로 동작하는 32 비트 RISC 프로세서와 전력을 제어할 수 있는 다수의 슬레이브가 동기되어 동작하는 전력 제어 임베디드 시스템을 구현하였다. Core-A 플랫폼은 Core-A 프로세서, AMBA 버스, SSRAM, AC97, DMA, UART, GPIO모듈 등으로 구성된다. 슬레이브는 4 비트의 디지털 데이터의 값에 비례하여 220V 전력을 제어할 수 있는 아날로그 회로와 마스터가 보내는 신호에 동기되어 다양한 전력제어 패턴을 생성하는 제어 시스템을 설계 하였다. Core-A 플랫폼이 라이브러리로 구축된 Flowrian II를 사용하여 소프트웨어를 크로스 컴파일하고 하드웨어 회로를 시뮬레이션으로 검증하였다. 임베디드 시스템은 FPGA 검증 보드와 CPLD 칩에 구현되었고 전력제어 아날로그 보드를 제작하여 구현하였다.

Keywords

References

  1. In-Kyu Jang, Dai-Tchul Moon, Hyoung-Kie Yun, Jae-Min Jang, Jeong-Seop Seo, "Design of Vision Embedded Platform with AVR", 2013 9th International Conference on Computing Technology and Information Management, ICCM 2013, 2013. 6.
  2. Dai-Tchul Moon, In-Hag Park, Hyoung-Kie Yun, Xu Gang, In-Kyu Jang, Woo-Kyung Lee, Jae-Min Jang, Ki-Young Jung, "An FPGA Implementation of Energy Saving Embedded System with Multiple Vision Sensor", 17th Asia-Pacific Conference on Communications, APCC 2011, 2011. 10.
  3. Ahn-Do Ki, Platform Design using Core-A Processor, Hong-Rung Pub., 2010. 3.
  4. Jong-Yeol Lee, Kang Lee, Si-Ho Kim, Byeong-Yoon Choi, Kwang-Yeob Lee, Design System-on-Chip Based on CORE-A Processor, Hong-Rung Pub., 2010. 11.
  5. Kwang-Yeob Lee, "An architecture for a High-performance Core-A Embedded Processor", 2009 Conference on SoC, IEIE, pp. 184-187, 2009. 5.
  6. Chang-Su Ha, Byeong-Yoon Choi, "Hardware Design of AES Cryptography Module Operating as Coprocessor of Core-A Microprocessor", KIICE Journal, No. 13(12), pp. 2569-2578, 2009. 12.
  7. Xuelong Xu., Jingzhe Xu, Seung-Pyo Jung, Ju-Sung Park, "The Design of Multi-media SoC Platform Based on Core-A Processor", IEIE Journal, No. 50(6), pp. 99-104, 2013. 6. https://doi.org/10.5573/ieek.2013.50.6.099
  8. Xuelong Xu., Jingzhe Xu, Seung-Pyo Jung, Ju-Sung Park, "Design and Verification of Efficient On-Chip Debugger for Core-A", IEIE Journal, No. 47(4), pp. 50-61, 2010. 4.
  9. Hyung-Bae Park, Jeong-Hoon Ji, JINGZHE XU, Gyun Woo, Ju-Sung Park, "Core-A Debugger and ICE", Conference on IEEK, pp. 192-195, 2009.
  10. Ming Ma, Hyoung-Kie Yun, Woo-Kyung Lee, Jung-Seop Seo, In-hag Park, Dai-Tchul Moon, "Web-Based IP Reuse CAD System, Flowrian", 2010 International Conference on Signal Processing, Image Processing and Pattern Recognition, SIP 2010, 2010. 12.
  11. Ming Ma, Hyoung-Kie Yun, Woo-Kyung Lee, Jung-Seop Seo, In-hag Park, Dai-Tchul Moon, "Engineering-SaaS CAD System for Embedded System Design, FlowrianII", IPSOC 2010, 2010. 12.
  12. In-Hag Park, Kwang-Ki Ryu, Jong-Hwa Na, Hae-Wook Choi, Design and Implementation experiment for Application HW/ SW with Openrisc Platform, Brain Korea Pub., 2008. 10.