Extended Boost Single-phase qZ-Source Inverter for Photovoltaic Systems

Abstract

This study presents an extended boost single-phase qZ-source DC-AC inverter for a single-phase photovoltaic system. Unlike the previously proposed single-phase qZ-source and semi-qZ-source inverters that achieve the same output voltage as that of the traditional voltage-fed full-bridge inverter, the proposed inverter can obtain higher output than input voltage. The proposed inverter also shares a common ground between DC input voltage and AC output voltage. Thus, possible ground leakage current problem in non-isolated grid-tied inverters can be eliminated with the proposed inverter. A 120 W prototype inverter is built and tested to verify the performance of the proposed inverter.

I. INTRODUCTION

An increasing demand for low-cost, single-phase DC–AC inverters has been observed in recent years in many applications, such as in photovoltaic (PV) systems, fuel cells, and battery-powered systems. The conventional approach to address this demand is to use a full-bridge (FB) inverter (Fig. 1).

Fig. 1Conventional single-phase FB inverter.

However, a conventional single-phase FB inverter requires four switches, and inverter output voltage is only equal to or smaller than input voltage. If input voltage is low, then the conventional approach requires a DC–DC boost (Fig. 2) at the front end to maintain sufficient DC-link voltage in the inverter. However, two-stage power conversion decreases system efficiency and increases system cost and volume. Another approach (Fig. 3) involves using a buck–boost inverter with two identical DC–DC converters that share the same DC input voltage while the load is across two outputs, namely, Vo1 and Vo2 [1]-[4].

Fig. 2Conventional two-stage single-phase FB inverter.

Although this topology can generate higher output voltage than input voltage, one of its distinct drawbacks is that the voltage stress of the switching device is too high and the circuit requires four switches to boost voltage [1]. Therefore, high efficiency cannot be expected with this topology. An additional problem with the conventional FB inverter in Fig. 1 and the buck–boost inverter in Fig. 3 is that the input and output have different grounds. For transformer-less, grid-tied PV inverter topologies, a large leakage current may occur if the input DC-source (PV) and grid do not share the same ground; this condition can cause safety and electromagnetic interference problems [5]-[7].

Fig. 3Conventional single-phase buck-boost inverter.

Many circuit topologies have been introduced recently to overcome the aforementioned problems; some of these topologies are based on a Z-source or qZ-source inverter structure [8]-[14]. Fig. 4(a) shows a single-phase current-fed (CF) qZ-source inverter, and Fig. 4(b) shows the voltage gain curve of this inverter [12].

Fig. 4Single-phase CF qZ-source inverter [12].

By defining D as the duty cycle of switch S2 , the voltage gain of the single-phase CF qZ-source inverter is expressed as follows [12]:

A voltage gain similar to the one shown in Fig. 4(b) can also be achieved by the recently developed semi-qZ-source inverter (Fig. 5) [13]. The voltage gain of this inverter is the same as that in Fig. 4 but requires less component counts.

Fig. 5Semi-qZ-source inverter [13].

Unlike the topologies shown in Fig. 1 to 3, the CF qZ-source and semi-qZ-source inverters shown in Fig. 4 and 5 share common grounds. Therefore, these circuits can eliminate the possible leakage current problem [13].

However, Fig. 4(b) shows that the voltage gains of the single-phase CF qZ-source and semi-qZ-source inverters are limited to 1. The output voltage cannot be greater than the input voltage such as in the conventional FB inverter shown in Fig. 1. Thus, these inverters still present a problem when they are used in low input voltage applications such as in micro-inverters.

An extended boost single-phase qZ-source inverter is introduced in this study to overcome the limited voltage gain of the single-phase CF qZ-source and semi-qZ-source inverters. The proposed inverter also shares a common ground between DC input and AC output voltage.

 

II. PRINCIPLE OPERATION OF THE PROPOSED INVERTER

Fig. 6 shows the proposed extended boost single-phase qZ-source inverter topology. Unlike the topology shown in Fig. 4, the proposed inverter has an additional switch ( Sx ) and capacitor (Cx ) to provide extended boost function [15, 16]. Similar to Fig. 4, switches S1 and S2 are turned on and off complementarily. The additional switch Sx is synchronized to S1 . The detailed mode operation of the proposed inverter is as follows.

Fig. 6Proposed extended boost single-phase qZ-source inverter.

A. Mode 1

Switches S1 and Sx are turned on and S2 is turned off in mode 1. Fig. 7(a) shows the operation in mode 1. Given that S1 and Sx are turned on, capacitor Cx is charged to Vin . The possible voltage difference between Vin and Cx being charged/discharged depends on output power. When voltage difference is high, the current in the charging path is also high [15]-[17]. Excessive current can damage switching devices and decrease the lifetime of components. A small current-limiting inductor ( Ll ) is connected in series with Sx to limit current in this work. Notably, although the added current-limiting inductor induces a voltage spike across S1 and Sx , such spike is low because the inductance value used is small (approximately 500 nH).

The voltage and current relations in this mode are shown in Fig. 7. The effect of Ll on voltage gain is neglected because the Ll value is small based on the analysis. Thus,

Fig. 7Operating principle of the proposed inverter.

B. Mode 2

Switches S1 and Sx are turned off and S2 is turned on in mode 2. Capacitor Cx is discharged by inductor L1 current. The voltage and current relations in this mode are as follows:

From the volt-sec (or flux) balance condition on L1 , L2 , and Lo , the following voltage equations are derived:

,where D is the duty cycle of switch S2.

Similarly, current equations are derived from the current-sec (or charge) balance condition on Cx , C1 , and C2 as follows:

Fig. 8 shows the voltage gain curve of the proposed inverter and its gain is compared with that in Fig. 4. The proposed inverter can achieve twice the voltage gain of the existing CF qZ-source and semi-qZ-source inverters.

Fig. 8Voltage gain comparison.

 

III. MODULATION SCHEME OF THE PROPOSED INVERTER

The modulation scheme of the proposed inverter is the same as those of the conventional CF qZ-source and semi-qZ-source inverters. The voltage gain curve of the proposed inverter is redrawn in Fig. 9 to determine the duty cycle and output voltage range of the proposed inverter.

Fig. 9Duty cycle range and achievable output voltage range of the proposed inverter.

Assuming that the inverter output voltage is represented by (24), then the modulation index (M) of the inverter is expressed as follows:

By substituting (24) and (25) into (20), the following formula is obtained:

Fig. 9 shows that the proposed inverter can generate an output voltage up to twice the input voltage. Thus, the maximum modulation index is 2. When M = 2, the duty cycle of the proposed inverter ranges from 0.2 to 1.0 as shown in Fig. 9.

Fig. 10 illustrates the modulation scheme of the proposed inverter. It shows that the reference ( vref ) and carrier ( vcarrier ) signals are compared to generate the required gate signals.

Fig. 10Gate signal generation of the proposed inverter.

 

IV. DEVICE STRESS AND PASSIVE COMPONENT DESIGN

The mode analysis of the proposed inverter shows that the voltages across all three inductors ( L1 , L2 , and Lo ) of the proposed inverter are the same in each corresponding operation mode. The results are summarized in Table I. The three inductor voltages in mode 1 are equal to Vin , whereas the three inductor voltages in mode 2 are equal to VC2 . Therefore, the three inductors can be coupled into one inductor core [18]. This procedure significantly reduces inductor volume, and consequently, total inverter size. Fig. 11 shows the circuit of the proposed inverter that uses a coupled inductor with the inductor polarity dots marked.

Table IVOLTAGES ACROSS L1, L2, AND Lo

Fig. 11Proposed inverter that uses a coupled inductor for L1, L2, and Lo .

From (18) and (19), as well as the defined labels in Fig. 11, switch voltage stresses are derived as follows:

From (21) and (22), as well as the defined labels in Fig. 11, switch current stresses are also derived as follows:

Table II shows the switch stresses of the proposed inverter and their comparison with those of the single-phase CF qZ-source inverter. The minus (−) sign in the current stress indicates that Io is a negative quantity at the corresponding duty cycle.

Table IICOMPARISON OF SWITCH STRESSES

 

V. EXPERIMENT RESULTS

A 120 W prototype inverter is built and tested to verify the performance of the proposed inverter. Table III shows the detailed electrical specifications of the proposed prototype inverter.

TABLE IIIELECTRICAL SPECIFICATIONS OF THE PROPOSED INVERTER

Fig. 12, 13, and 14 show the experimental waveforms of the proposed inverter when Vin = 80, 105, and 135 V, respectively. The output voltage and output power are 110 Vrms and 120 W, respectively. The voltages across Cx and C1 are nearly equal to Vin and 2Vin , respectively.

Fig. 12Experimental waveforms of the proposed inverter (Vin = 80 V, M = 1.95).

Fig. 13Experimental waveforms of the proposed inverter (Vin = 105 V, M = 1.48).

Fig. 14Experimental waveforms of the proposed inverter (Vin = 135 V, M = 1.15).

Fig. 15(a) shows the experimental waveform of switches S1 and S2 when Vin = 80 V, M = 1.95, and Po = 120 W. Fig. 15(b) shows the zoomed-in switching waveforms of Fig. 15(a). Fig. 16(a) shows the experimental waveforms of the voltage and current of switch Sx . Fig. 16(b) and 16(c) show the zoomed-in waveforms of the dotted boxes in Fig. 16(a).

Fig. 15Switching waveforms (Vin = 80 V, M = 1.95).

Fig. 16Waveforms of switch Sx .

An inductor with approximately 500 nH is used in the experiment to limit switch Sx current. A slight voltage spike is observed in switch Sx because of this inductance, but the spike is low and the current is limited. The current directions of Sx depend on output voltage polarity.

Fig. 16(b) and 16(c) show the waveforms when the output voltage has a negative and positive polarity, respectively. Fig. 17 shows the measured efficiency curve of the proposed inverter when input voltage varies. The efficiency of the proposed inverter is compared with those of the inverters shown in Fig. 2 and 3. Similar switching devices are used for the comparison.

Fig. 17Measured efficiency of the proposed inverter and its comparison with the inverter shown in Fig. 2 and 3.

Fig. 18 shows a photograph of the proposed inverter.

Fig. 18Photograph of the proposed inverter .

 

VI. CONCLUSIONS

This study presents an extended boost single-phase qZ-source inverter based on the existing CF single-phase qZ-source inverter. With an additional circuit that consists of Sx and Cx , the output voltage of the proposed inverter can be extended up to twice the input voltage.

Similar to the existing single-phase qZ-source and semi-qZ-source inverters, the proposed inverter shares a common ground between DC input voltage and AC output voltage. Therefore, the possible ground leakage current problem, particularly in transformer-less grid-tied PV applications, can be eliminated with the proposed inverter.

A 120 W prototype inverter is built and successfully tested to verify the operation principle of the proposed inverter. With its extended boost property and doubly grounded features, the proposed inverter is promising for applications with low input voltage sources such as batteries, PV cells, and fuel cells.