전기학회논문지 (The Transactions of The Korean Institute of Electrical Engineers)

  • 제64권11호
  • /
  • Pages.1564-1570
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  • 2015
  • /
  • 1975-8359(pISSN)
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  • 2287-4364(eISSN)
대한전기학회 (The Korean Institute of Electrical Engineers)
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아날로그 회로를 이용한 3상 PWM 출력 전압 측정

Sensing of Three Phase PWM Voltages Using Analog Circuits

  • Jou, Sung-Tak (Dept. of Electrical and Computer Engineering, Ajou University) ;
  • Lee, Kyo-Beum (Dept. of Electrical and Computer Engineering, Ajou University)
  • 투고 : 2015.08.25
  • 심사 : 2015.10.21
  • 발행 : 2015.11.01
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초록

This paper intends to suggest a sensing circuit of PWM voltage for a motor emulator operated in the inverter. In the emulation of the motor using a power converter, it is necessary to measure instantaneous voltage at the PWM voltage loaded from the inverter. Using a filter can generate instantaneous voltage, while it is difficult to follow the rapidly changing inverter voltage caused by the propagation delay and signal attenuation. The method of measuring the duty of PWM using FPGA can generate output voltage from the one-cycle delay of PWM, while the cost of hardware is increasing in order to acquire high precision. This paper suggests a PWM voltage sensing circuit using the analogue system that shows high precision, one-cycle delay of PWM and low-cost hardware. The PWM voltage sensing circuit works in the process of integrating input voltage for valid time by comparing levels of three-phase PWM input voltage, and produce the output value integrated at zero vector. As a result of PSIM simulation and the experiment with the produced hardware, it was verified that the suggested circuit in this paper is valid.

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참고문헌

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