JSTS:Journal of Semiconductor Technology and Science

The Institute of Electronics and Information Engineers (대한전자공학회)
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An Adaptive-Bandwidth Referenceless CDR with Small-area Coarse and Fine Frequency Detectors

  • Kwon, Hye-Jung (Pohang University of Science and Technology Dept. of Electrical Engineering) ;
  • Lim, Ji-Hoon (Pohang University of Science and Technology Dept. of Electrical Engineering) ;
  • Kim, Byungsub (Pohang University of Science and Technology Dept. of Electrical Engineering) ;
  • Sim, Jae-Yoon (Pohang University of Science and Technology Dept. of Electrical Engineering) ;
  • Park, Hong-June (Pohang University of Science and Technology Dept. of Electrical Engineering)
  • Received : 2015.03.05
  • Accepted : 2015.05.19
  • Published : 2015.06.30
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Abstract

Small-area, low-power coarse and fine frequency detectors (FDs) are proposed for an adaptive bandwidth referenceless CDR with a wide range of input data rate. The coarse FD implemented with two flip-flops eliminates harmonic locking as long as the initial frequency of the CDR is lower than the target frequency. The fine FD samples the incoming input data by using half-rate four phase clocks, while the conventional rotational FD samples the full-rate clock signal by the incoming input data. The fine FD uses only a half number of flip-flops compared to the rotational FD by sharing the sampling and retiming circuitry with PLL. The proposed CDR chip in a 65-nm CMOS process satisfies the jitter tolerance specifications of both USB 3.0 and USB 3.1. The proposed CDR works in the range of input data rate; 2 Gb/s ~ 8 Gb/s at 1.2 V, 4 Gb/s ~ 11 Gb/s at 1.5 V. It consumes 26 mW at 5 Gb/s and 1.2 V, and 41 mW at 10 Gb/s and 1.5 V. The measured phase noise was -97.76 dBc/Hz at the 1 MHz frequency offset from the center frequency of 2.5 GHz. The measured rms jitter was 5.0 ps at 5 Gb/s and 4.5 ps at 10 Gb/s.

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References

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