전자공학회논문지 (Journal of the Institute of Electronics and Information Engineers)

  • 제52권9호
  • /
  • Pages.21-27
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  • 2015
  • /
  • 2287-5026(pISSN)
  • /
  • 2288-159X(eISSN)
대한전자공학회 (The Institute of Electronics and Information Engineers)
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High Resistivity SOI RF CMOS 대칭형 인덕터 모델링을 위한 개선된 Optimization 방법 연구

A Study on Improved Optimization Method for Modeling High Resistivity SOI RF CMOS Symmetric Inductor

  • 안자현 (한국외국어대학교 전자공학과) ;
  • 이성현 (한국외국어대학교 전자공학과)
  • Ahn, Jahyun (Department of Electronics Engineering, Hankuk University of Foreign Studies) ;
  • Lee, Seonghearn (Department of Electronics Engineering, Hankuk University of Foreign Studies)
  • 투고 : 2015.07.28
  • 심사 : 2015.09.03
  • 발행 : 2015.09.25
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초록

High resistivity(HR) silicon-on-insulator(SOI) RF CMOS 공정 인덕터의 모델 파라미터를 정확히 결정하기 위하여 직접추출과 simultaneous optimization을 사용한 개선된 방법을 개발하였다. 먼저, 대칭형 인덕터와 센터탭이 접지된 대칭형 인덕터 등가회로들의 Y 및 Z-파라미터 방정식 유도를 통해 일부 모델 파라미터들을 직접 추출하고, 병렬 저항과 전체 인덕턴스 방정식들로 미지 변수들을 줄여 모델링 정확도를 향상시켰다. 또한, 두 등가회로의 동일한 모델 파라미터들을 공통 변수로 두고 S-파라미터 데이터 세트를 동시에 optimization함으로써 optimization 정확도를 크게 향상시켰다.

An improved method based on direct extraction and simultaneous optimization is developed to determine model parameters of symmetric inductors fabricated by the high resistivity(HR) silicon-on-insulator(SOI) RF CMOS process. In order to improve modeling accuracy, several model parameters are directly extracted by Y and Z-parameter equations derived from two equivalent circuits of symmetric inductor and grounded center-tap one, and the number of unknown parameters is reduced using parallel resistance and total inductance equations. In order to improve optimization accuracy, two sets of measured S-parameters are simultaneously optimized while same model parameters in two equivalent circuits are set to common variables.

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참고문헌

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