The Journal of Korean Institute of Electromagnetic Engineering and Science (한국전자파학회논문지)

The Korean Institute of Electromagnetic Engineering and Science (한국전자파학회)
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Inductor-less 6~18 GHz 7-Bit 28 dB Variable Attenuator Using 0.18 μm CMOS Technology

0.18 μm CMOS 기반 인덕터를 사용하지 않는 6~18 GHz 7-Bit 28 dB 가변 신호 감쇠기

  • Na, Yun-Sik (Department of Electronic and Computer Engineering, Sungkyunkwan University) ;
  • Lee, Sanghoon (Department of Electronic and Computer Engineering, Sungkyunkwan University) ;
  • Kim, Jaeduk (Electronic Warfare R&D Lab., LIG Nex1 Co., Ltd.) ;
  • Lee, Wangyoung (Electronic Warfare R&D Lab., LIG Nex1 Co., Ltd.) ;
  • Lee, Changhoon (The 2nd R&D Institute, ADD) ;
  • Lee, Sungho (Intelligent SoC Research Center, KETI) ;
  • Seo, Munkyo (Department of Electronic and Computer Engineering, Sungkyunkwan University) ;
  • Lee, Sung Chul (Intelligent SoC Research Center, KETI)
  • 나윤식 (성균관대학교 전자전기컴퓨터공학과) ;
  • 이상훈 (성균관대학교 전자전기컴퓨터공학과) ;
  • 김재덕 (LIG넥스원 전자전연구센터) ;
  • 이왕용 (LIG넥스원 전자전연구센터) ;
  • 이창훈 (국방과학연구소(ADD) 전자전 기술부) ;
  • 이성호 (전자부품연구원(KETI) 시스템반도체 연구본부) ;
  • 서문교 (성균관대학교 전자전기컴퓨터공학과) ;
  • 이성철 (전자부품연구원(KETI) 시스템반도체 연구본부)
  • Received : 2015.12.10
  • Accepted : 2016.01.13
  • Published : 2016.01.31
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Abstract

This paper presents a 6~18 GHz 7-bit digital-controlled attenuator. The proposed attenuator is based on switched-T architecture, but no inductor is used for minimum chip size. The designed attenuator was fabricated using $0.18{\mu}m$ CMOS process, and characterized using on-wafer testing setup. The resolution(minimum attenuation step) and the maximum attenuation range of the attenuator were measured to be 0.22 dB and 28 dB, respectively. The measured RMS attenuation error and the RMS phase error for 6~18 GHz were less than 0.26 dB and $3.2^{\circ}$, respectively. The reference state insertion loss was less than 12.4 dB at 6~18 GHz. The measured input and output return losses were better than 9.4 dB over all frequencies and attenuation states. The chip size is $0.11mm^2$ excluding pads.

본 논문에서는 6~18 GHz 대역 7-bit 28 dB 가변 신호 감쇠기의 설계 및 측정결과에 대하여 기술하였다. 기존의 switched-T 감쇠기에 칩 사이즈를 최소화하기 위해 인덕터를 사용하지 않았고, 보상용 병렬 커패시터를 추가하여 참조 상태 (reference state)와 감쇠 상태간의 위상 변화를 최소화하였다. 설계된 감쇠기는 $0.18{\mu}m$ CMOS 공정을 이용하여 제작하였다. 측정된 감쇠기의 해상도와 전체 감쇠 범위는 각각 0.22 dB 및 28 dB이다. 6~18 GHz의 동작 주파수에서 RMS 감쇠 오차는 0.26 dB 이하, 위상 오차는 $3.2^{\circ}$ 이하로 측정되었으며, 참조상태 손실은 12.4 dB 이하이다. 전체 주파수 범위와 감쇠상태에서 입출력 반사손실은 9.4 dB 이상이다. 패드를 포함하지 않은 칩 면적은 $0.11mm^2$이다.

Keywords

References

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