Journal of Applied Reliability (한국신뢰성학회지:신뢰성응용연구)

The Korean Reliability Society (한국신뢰성학회)
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Evaluation of Fracture Strength of Silicon Wafer for Semiconductor Substrate by Point Load Test Method

점하중시험법에 의한 반도체 기판용 실리콘 웨이퍼의 파괴강도 평가

  • Lee, Seung-Mi (Department of Graduate School NID Fusion Technology, Seoul national University of Science & Technology) ;
  • Byeon, Jai-Won (Department of Materials Science and Engineering, Seoul National University of Science and Technology)
  • 이승미 (서울과학기술대학교 NID 대학원) ;
  • 변재원 (서울과학기술대학교 신소재공학과)
  • Received : 2016.02.05
  • Accepted : 2016.02.19
  • Published : 2016.03.25
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Abstract

Purpose: The purpose of this study was to investigate the effect of grinding process and thickness on the fracture strength of silicon die used for semiconductor substrate. Method: Silicon wafers with different thickness from $200{\mu}m$ to $50{\mu}m$ were prepared by chemical mechanical polishing (CMP) and dicing before grinding (DBG) process, respectively. Fracture load was measured by point load test for 50 silicon dies per each wafer. Results: Fracture strength at the center area was lower than that at the edge area of the wafer fabricated by DBG process, while random distribution of the fracture strength was observed for the CMPed wafer. Average fracture strength of DBGed specimens was higher than that of the CMPed ones for the same thickness of wafer. Conclusion: DBG process can be more helpful for lowering fracture probability during the semiconductor fabrication process than CMP process.

Keywords

References

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