The Transactions of The Korean Institute of Electrical Engineers (전기학회논문지)

The Korean Institute of Electrical Engineers (대한전기학회)
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Parallel String Matching and Optimization Using OpenCL on FPGA

FPGA 상에서 OpenCL을 이용한 병렬 문자열 매칭 구현과 최적화 방향

  • Yoon, Jin Myung (School of Electronics and Electrical Engineering, Dankook University) ;
  • Choi, Kang-Il (Advanced Communications Research Laboratory, Electronics and Telecommunications Research Institute) ;
  • Kim, Hyun Jin (School of Electronics and Electrical Engineering, Dankook University)
  • Received : 2016.08.30
  • Accepted : 2016.11.14
  • Published : 2017.01.01
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Abstract

In this paper, we propose a parallel optimization method of Aho-Corasick (AC) algorithm and Parallel Failureless Aho-Corasick (PFAC) algorithm using Open Computing Language (OpenCL) on Field Programmable Gate Array (FPGA). The low throughput of string matching engine causes the performance degradation of network process. Recently, many researchers have studied the string matching engine using parallel computing. FPGA's vendors offer a parallel computing platform using OpenCL. In this paper, we apply the AC and PFAC algorithm on DE1-SoC board with Cyclone V FPGA, where the optimization that considers FPGA architecture is performed. Experiments are performed considering global id, local id, local memory, and loop unrolling optimizations using PFAC algorithm. The performance improvement using loop unrolling is 129 times greater than AC algorithm that not adopt loop unrolling. The performance improvements using loop unrolling are 1.1, 0.2, and 1.5 times greater than those using global id, local id, and local memory optimizations mentioned above.

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References

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