Journal of the Korea Institute of Military Science and Technology (한국군사과학기술학회지)

The Korea Institute of Military Science and Technology (한국군사과학기술학회)
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Signal Processing Logic Implementation for Compressive Sensing Digital Receiver

압축센싱 디지털 수신기 신호처리 로직 구현

  • 안우현 (한화시스템(주) 전자전연구센터) ;
  • 송장훈 (한화시스템(주) 전자전연구센터) ;
  • 강종진 (한화시스템(주) 전자전연구센터) ;
  • 정웅 (자일링스 코리아 기술영업부)
  • Received : 2017.12.22
  • Accepted : 2018.06.22
  • Published : 2018.08.05
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Abstract

This paper describes the real-time logic implementation of orthogonal matching pursuit(OMP) algorithm for compressive sensing digital receiver. OMP contains various complex-valued linear algebra operations, such as matrix multiplication and matrix inversion, in an iterative manner. Xilinx Vivado high-level synthesis(HLS) is introduced to design the digital logic more efficiently. The real-time signal processing is realized by applying dataflow architecture allowing functions and loops to execute concurrently. Compared with the prior works, the proposed design requires 2.5 times more DSP resources, but 10 times less signal reconstruction time of $1.024{\mu}s$ with a vector of length 48 with 2 non-zero elements.

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References

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