DOI QR코드

DOI QR Code

A Lightweight Hardware Accelerator for Public-Key Cryptography

공개키 암호 구현을 위한 경량 하드웨어 가속기

  • Received : 2019.10.29
  • Accepted : 2019.11.12
  • Published : 2019.12.31

Abstract

Described in this paper is a design of hardware accelerator for implementing public-key cryptographic protocols (PKCPs) based on Elliptic Curve Cryptography (ECC) and RSA. It supports five elliptic curves (ECs) over GF(p) and three key lengths of RSA that are defined by NIST standard. It was designed to support four point operations over ECs and six modular arithmetic operations, making it suitable for hardware implementation of ECC- and RSA-based PKCPs. In order to achieve small-area implementation, a finite field arithmetic circuit was designed with 32-bit data-path, and it adopted word-based Montgomery multiplication algorithm, the Jacobian coordinate system for EC point operations, and the Fermat's little theorem for modular multiplicative inverse. The hardware operation was verified with FPGA device by implementing EC-DH key exchange protocol and RSA operations. It occupied 20,800 gate equivalents and 28 kbits of RAM at 50 MHz clock frequency with 180-nm CMOS cell library, and 1,503 slices and 2 BRAMs in Virtex-5 FPGA device.

ECC (Elliptic Curve Cryptography)와 RSA를 기반으로 하는 다양한 공개키 암호 프로토콜 구현을 지원하는 하드웨어 가속기 설계에 관해 기술한다. NIST 표준으로 정의된 소수체 상의 5가지 타원곡선과 3가지 키길이의 RSA를 지원하며 또한, 4가지 타원곡선 점 연산과 6가지 모듈러 연산을 지원하도록 설계되어 ECC와 RSA 기반 다양한 공개키 암호 프로토콜의 하드웨어 구현에 응용될 수 있다. 저면적 구현을 위해 내부 유한체 연산회로는 32 비트의 데이터 패스로 설계되었으며, 워드 기반 몽고메리 곱셈 알고리듬, 타원곡선 점 연산을 위해서는 자코비안 좌표계, 그리고 모듈러 곱의 역원 연산을 위해서는 페르마 소정리를 적용하였다. 설계된 하드웨어 가속기를 FPGA 디바이스에 구현하여 EC-DH 키교환 프로토콜과 RSA 암호·복호 둥작을 구현하여 하드웨어 동작을 검증하였다. 180-nm CMOS 표준 셀 라이브러리로 합성한 결과, 50 MHz 클록 주파수에서 20,800 등가게이트와 28 kbit의 RAM으로 구현되었으며, Virtex-5 FPGA 디바이스에서 1,503 슬라이스와 2개의 BRAM으로 구현되었다.

Keywords

Acknowledgement

ㆍThis work was supported by Basic Science Research Program through the National Research Foundation of Korea(NRF) funded by the Ministry of Education(No. 2017R1D1A3B03031677) ㆍThis research was supported by the KIAT(Korea Institute for Advancement of Technology) grant funded by the Korea Government(MOTIE: Ministry of Trade Industry and Energy). (No. N0001883, HRD Program for Intelligent semiconductor Industry) ㆍAuthors are thankful to IDEC for supporting EDA software.

References

  1. C. Paar and J. Pelzl, "Introduction to Public-Key Cryptography," Chapter 6 in Understanding Cryptography, A Textbook for Students and Practitioners, Springer, 2009.
  2. O. Toshihiko, "Lightweight Cryptography Applicable to various IoT Devices," NEC Technical Journal, vol. 12, no. 1, pp. 67-71, Oct. 2017,
  3. J. Athenaorcid and V. Sumathy, "Survey on Public Key Cryptography Scheme for Securing Data in Cloud Computing," Circuits and Systems, vol. 8, no. 3, pp. 77-92, Aug. 2017. https://doi.org/10.4236/cs.2017.83005
  4. R. Rivest, A. Shamir and L. Adleman, "A method for obtaining Digital Signatures and Public-Key Crypto-systems," Communications of the ACM, vol. 21, no. 2, pp. 120-126, Feb. 1978. https://doi.org/10.1145/359340.359342
  5. N. Koblitz, "Elliptic curve cryptosystems," Mathematics of Computation, vol. 48, no. 177, pp. 203-209, Jan. 1987. https://doi.org/10.1090/S0025-5718-1987-0866109-5
  6. V.S. Miller, "Use of elliptic curve in cryptography," CRYPTO85: Proceedings of the Advances in Cryptology, Springer-Verlag, 1986, pp. 417-426.
  7. Z.U. Khan and M. Benaissa, "High-Speed and Low-Latency ECC Processor Implementation Over GF (2^m) on FPGA," IEEE Transactions on Very Large Scale Integration (VLSI) Systems vol. 25, no. 1, pp. 165-176, Jan. 2017. https://doi.org/10.1109/TVLSI.2016.2574620
  8. S.H. Lee and K.W. Shin, "A Lightweight Hardware Implementation of ECC Processor Supporting NIST Elliptic Curves over ," Journal of Institute of Korean Electrical and Electronics Engineers, vol. 23, no. 1, pp. 58-67, Mar. 2019.
  9. B.G. Park and K.W. Shin, "A Lightweight ECC Processor Supporting Elliptic Curves over NIST Prime Fields," Journal of The Institute of Electronics and Information Engineers, vol. 55, no. 9, pp. 1107-1115, Sep. 2018.
  10. K.C.C. Loi and S.B. Ko, "Scalable elliptic curve cryptosystem FPGA processor for NIST prime curves," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 23, no. 11, pp. 2753-2756, Nov. 2015. https://doi.org/10.1109/TVLSI.2014.2375640
  11. B.Y. Sung, "A Lightweight Public-key Cryptography Processor Integrating ECC and RSA into a Unified Hardware," Thesis, Kumoh National Institute of Technology, Korea, 2019.
  12. NIST Std. FIPS PUB 186-2, Digital Signature Standard (DSS), National Institute of Standard and Technology (NIST), Jan. 2000.
  13. Standards for Efficient Cryptography Group, SEC 2: Recommended Elliptic Curve Domain Parameters, version 2.0, Jan. 2010. Available: https://www.secg.org/sec2-v2.pdf
  14. A.P. Zele and A.P. Wadhe, "Comparatively Study of ECC and Jacobian Elliptic Curve Cryptography," International Journal of Science and Research (IJSR), pp. 2086-2089, 2013.
  15. K. Javeed, X. Wang and M. Scott, "High performance hardware support for elliptic curve cryptography over general prime field," Microprocessors and Microsystems, vol. 51, pp. 331-342, Jun. 2017. https://doi.org/10.1016/j.micpro.2016.12.005
  16. Z. Liu, D. Liu and X. Zou, "An Efficient and Flexible Hardware Implementation of the Dual-Field Elliptic Curve Cryptographic Processor," IEEE Transactions on Industrial Electronics, vol. 64, No. 3, Mar. 2017.
  17. W.L. Cho and K.W. Shin, "Scalable RSA public-key cryptography processor based on CIOS Montgomery modular multiplication Algorithm," Journal of the Korea Institute of Information and Communication Engineering, vol. 22, no. 1, pp. 100-108, Jan. 2018. https://doi.org/10.6109/jkiice.2018.22.1.100