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Coupled Inductor Design Method for 2-Phase Interleaved Boost Converters

  • Liang, Dong (Department of Electrical Engineering, Gyeongsang National University) ;
  • Shin, Hwi-Beom (Department of Electrical Engineering, Gyeongsang National University)
  • Received : 2018.07.09
  • Accepted : 2018.12.03
  • Published : 2019.03.20

Abstract

To achieve high efficiency and reliability, multiphase interleaved converters with coupled inductors have been widely applied. In this paper, a coupled inductor design method for 2-phase interleaved boost converters is presented. A new area product equation is derived to select the proper core size. The wire size, number of turns and air gap length are also determined by using the proposed coupled inductor design method. Finally, the validity of the proposed coupled inductor design method is confirmed by simulation and experimental results obtained from a design example.

Keywords

I. INTRODUCTION

The interleaved boost converter is widely applied in electric vehicle applications, power factor correction converters and photovoltaic arrays [1]-[3]. However, applying the interleaved technique requires additional inductors according to the number of phases. Since multiple discrete inductors make up a significant percentage of the volume and increase the complexity of converters, the coupled inductor has been proposed instead of multiple discrete inductors [4]-[7]. By integrating discrete inductors into one coupled inductor, the volume, price and number of inductors are further reduced.

As mentioned in [4], with inversely coupled inductors, the efficiency of a converter can be improved by 2 % under full loads and by 10 % under light loads when compared with non-coupled inductors. The coupled inductor can improve both the steady-state and dynamic performances of VRMs. In [8], a generalized steady-state analysis of multiphase interleaved boost converters with coupled inductors was addressed. The coupled inductors can improve both the performances of the input and the inductor ripple current.

Unfortunately, although coupled inductors can improve the performances of interleaved converters, the design methods of the coupled inductors are not mentioned in [4] and [8]. In addition, the core size is mentioned without giving a selection method, which leads to other designers not knowing how to start the design.

A coupled inductor design method was mentioned in [9]. The core selection was facilitated by calculating the core area product (AP) required by the application, and relating this calculation to the APs of the available cores. However, this coupled inductor design method is not suitable for the coupled inductor used in interleaved boost converters. Fig. 1 shows two existing coupled inductor structures of 2-phase interleaved boost converters. These structures were first presented by P. L. Wong in [4]. The winding structures of the coupled inductors are symmetrical. Therefore, the number of turns of phase 1 and phase 2 are the same. Considering the fabrication of EE or EI cores, the air gaps in the three legs are set to be the same. This is the simplest structure which means the cores do not need to be milled, and the two core parts can rely on separation to prevent them from saturating. The structure of the coupled inductor with two windings presented in [9] for a multiple-output buck derived regulator is shown in Fig. 2. The two windings are wound in the center leg, which is different from the coupled inductor structure of the 2-phase interleaved boost converter shown in Fig. 1. The inductor voltages of the coupled inductor shown in Fig. 2 are in phase, which means the maximum flux of the core is the sum of the maximum fluxes during windings 1 and 2. However, for interleaved converters, the inductor voltages are phase shifted. In addition, for the coupled inductor shown in Fig. 2, one core window area contains two windings. Thus, the currents flowing through both windings are taken into account when designing the inductor. However, for the coupled inductor used in 2-phase interleaved boost converters, there is only one winding in one core window area, which means that only one phase current needs to be considered in the design. The reasons described above lead to different AP equations for the coupled inductor of the 2-phase interleaved boost converter shown in Fig. 1 and the coupled inductor of the multiple-output buck derived regulator shown in Fig. 2.

E1PWAX_2019_v19n2_344_f0001.png 이미지

Fig. 1. Existing coupled inductor structures of a 2-phase interleaved boost converter. (a) Inversely coupled. (b) Directly coupled.

E1PWAX_2019_v19n2_344_f0002.png 이미지

Fig. 2. Structure of the coupled inductor presented in [9].

Therefore, in this paper, with the coupled inductor structures shown in Fig. 1, a detailed coupled inductor design method is presented for 2-phase interleaved boost converters operated in the continuous conduction mode (CCM). A new AP equation is also derived for selecting the core size. The wire size, number of turns and air gap length are also determined by using the proposed coupled inductor design method. Finally, the validity of proposed coupled inductor design method is confirmed by simulation and experimental results.

II. AREA PRODUCT OF THE COUPLED INDUCTORS FOR 2-PHASE INTERLEAVED BOOST CONVERTERS

The area product is the magnetic cross-sectional area times the window area. The AP method is a good strategy for selecting the core size when designing magnetic components. Since the energy handling capability of a core is related to its area product, the core selection is facilitated by calculating the core area product required by the application and relating this calculation to the APs of the available cores. The smallest available core can be selected from catalog data, where the area product exceeds the calculated value and the inductance is adjusted by the air gap length [10]. For the coupled inductors used in 2-phase interleaved boost converters, the AP equation can be derived as follows. The international system of units (SI) is used in the follow equations. However, the dimensions of the AP equation are later changed from meters to centimeters.

When the maximum allowed dc bias current is exceeded, the inductor saturates and the inductor peak current becomes extremely large, which results in a drop in efficiency and anomalous behavior. For 2-phase interleaved boost converters, the area product of the coupled inductors is calculated at the maximum inductor dc current. The case where the inductor dc current is maximum is regarded as the worst case. It occurs at the minimum input voltage, maximum output power and maximum duty cycle of the MOSFET. The maximum inductor dc current can be written as:

\(I_{L d c m a x}=\frac{P_{o m a x}}{2 \eta V_{o}\left(1-D_{m a x}\right)},\)       (1)

where Pomax is the maximum output power, Vo is the output voltage, η is the estimation efficiency of the converter, and Dmax is the maximum duty cycle of the MOSFET, which can be expressed as:

\(D_{\max }=1-\frac{V_{gmin }}{V_{o}},\)       (2)

where Vgmin is the minimum input voltage.

For one core window area, the ampere-turns of one phase is equal to the current density times the conductor area of one phase, which in the worst case can be expressed as:

\(N I_{L r m s w t}=J_{max } W_{a} K_{u},\)       (3)

where Jmax is the maximum current density, Wa is one of the core window areas, Ku is the core window utilization factor, and ILrmswt is the inductor rms current in the worst case, which can be derived as:

\(I_{L r m s w t} \approx \sqrt{\left[\frac{P_{o m a x}}{2 \eta V_{o}\left(1-D_{m a x}\right)}\right]^{2}+\frac{1}{12}\left(\frac{V_{gmin } D_{max }}{L_{e q} f_{s}}\right)^{2}},\)       (4)

where fs is the switching frequency, and Leq is the equivalent inductance, which was analyzed in [4] and can be summarized as:

\(L_{e q}=\left\{\begin{array}{ll} \frac{\left(L_{s}+\rho M\right)\left(L_{s}-\rho M\right)}{L_{s}+\rho M \frac{D_{\max }}{1-D_{\max }}} & \text { for } 0<~D_{\max }<~0.5 \\ \frac{\left(L_{s}+\rho M\right)\left(L_{s}-\rho M\right)}{L_{s}+\rho M} \frac{1-D_{\max }}{D_{\max }} & \text { for } 0.5<~D_{\max }<~1 \end{array}\right.\)       (5)

where Ls and M are the self and mutual inductances, respectively. ρ is called coupling parameter, ρ = 1 means direct coupling, and ρ = -1 means inverse coupling.

In order to keep the core from saturation, the maximum flux density of the core under the worst case should be considered. For the coupled inductor structures shown in Fig. 1, the maximum flux density of the core is the maximum flux density of the outer leg (the derivation is shown in the appendix) and it can be expressed as:

\(B_{m a x}=\frac{\phi_{d c}+\frac{\Delta \phi}{2}}{A_{e o}},\)       (6)

where Aeo is the cross-sectional area of the outer leg, and ϕdc is the dc flux of the outer leg under the worst case, which can be obtained from the magnetic circuits shown in Fig. 3 as:

\(\phi_{d c}=\left(1+\frac{\rho R_{c}}{R_{o}+R_{c}}\right) \frac{N I_{L d c m a x}}{R_{o}+R_{o} / / R_{c}},\)       (7)

where N is the actual number of turns of one phase, and Ro is the reluctance of the outer leg, which can be expressed as:

\(R_{o}=\frac{l_{g}}{\mu_{0} A_{e o}},\)       (8)

where Rc is the reluctance of the center leg, which can be expressed as:

\(R_{c}=\frac{l_{g}}{\mu_{0} A_{e}},\)       (9)

where lg is the air gaps in the center and outer legs, Ae is the cross-sectional area of the center leg, μ0 is the permeability of air, ∆ϕ is the peak to peak flux of the outer leg under the worst case, which can be derived from Faraday’s law as:

\(\Delta \phi=\frac{V_{gmin } D_{max }}{N f_{s}}.\)       (10)

Using the above equations, the maximum flux density under the worst case can be rewritten as:

\(B_{max }=\frac{1}{N A_{e o}}\left[\left(1+\frac{\rho R_{c}}{R_{o}+R_{c}}\right) \frac{N^{2} I_{L d c m a x}}{R_{o}+R_{o} / / R_{c}}+\frac{V_{gmin } D_{max }}{2 f_{s}}\right].\)       (11)

As mentioned in [4], the self and mutual inductances can be given as:

\(L_{s}=\frac{N^{2}}{R_{o}+R_{o} / / R_{c}},\)       (12)

\(M=\frac{N^{2} R_{c}}{\left(R_{o}+R_{c}\right)\left(R_{o}+R_{o} / / R_{c}\right)}.\)       (13)

Substituting (12) and (13) into (11) gives:

\(B_{max }=\frac{1}{N A_{e o}}\left[\left(L_{s}+\rho M\right) I_{L d c m a x}+\frac{V_{gmin } D_{max }}{2 f_{s}}\right].\)       (14)

Solving the above equation for N yields:

\(N=\frac{\left(L_{s}+\rho M\right) I_{L d \text {cmax}}+\frac{V_{gmin} D_{max}}{2 f_{s}}}{B_{max} A_{e o}}.\)       (15)

Substituting (15) into (3) gives:

\(\frac{\left(L_{s}+\rho M\right) I_{L d c m a x}+\frac{V_{gmin } D_{max }}{2 f_{s}}}{B_{max } A_{e o}} I_{L r m s w t}=J_{max } W_{a} K_{u}.\)       (16)

Since Ae ≈ 2Aeo, the above equation can be rewritten as:

\(\frac{2 I_{L r m s w t}\left[\left(L_{s}+\rho M\right) I_{L d c m a x}+\frac{V_{gmin } D_{max }}{2 f_{s}}\right]}{B_{max } A_{e}} \approx J_{max } W_{a} K_{u}.\)       (17)

Finally, the above equation is solved for the area product dimension in centimeters as:

\(\begin{aligned} A P=& W_{a} A_{e} \\ &=\frac{2 \times 10^{4} I_{L r m \mathrm{sw} t}\left[\left(L_{s}+\rho M\right) I_{L d c m a x}+\frac{V_{gmin } D_{max }}{2 f_{s}}\right]}{J_{max } B_{max } K_{u}} \mathrm{cm}^{4}. \end{aligned}\)       (18)

E1PWAX_2019_v19n2_344_f0003.png 이미지

Fig. 3. Magnetic circuits. (a) Inversely coupled. (b) Directly coupled.

III. PROPOSED COUPLED INDUCTOR DESIGN METHOD FOR 2-PHASE INTERLEAVED BOOST CONVERTERS

A flowchart of the procedure for the proposed coupled inductor design method for 2-phase interleaved boost converters is presented in Fig. 4.

E1PWAX_2019_v19n2_344_f0004.png 이미지

Fig. 4. Flowchart of the coupled inductor design method procedure for 2-phase interleaved boost converters.

Step-1: Specifications given

The starting point of the procedure is the specifications of the converter system.

Step-2: Determine the self and mutual inductances

\(\Delta i_{g}=\left\{\begin{array}{cl} \frac{V_{\varepsilon}(1-2 D) D}{\left(L_{s}+\rho M\right)(1-D) f_{s}} & \text { for } 0~<~D~<~0.5 \\ \frac{V_{s}(2 D-1)}{\left(L_{s}+\rho M\right) f_{s}} & \text { for } 0.5<~D<~1 \end{array}\right.\)       (19)

where Vg is the input voltage and D is the duty cycle of the MOSFET.

Since Ae ≈ 2Aeo, substituting this into (8) and (9) gives:

\(R_{o} \approx 2 R_{c}.\)       (20)

Substituting (20) into (12) and (13) gives:

\(L_{s} \approx 3 M.\)       (21)

Then under the worst case, the self and mutual inductances can be derived from (19) and (21) as:

\(L_{s}=\left\{\begin{array}{cl} \frac{3 V_{\text {gnin}}\left(1-2 D_{\max }\right) D_{\max }}{(3+\rho) \Delta_{g \max }\left(1-D_{\max }\right) f_{s}} & \text { for } 0<~D_{\max }<~0.5 \\ \frac{3 V_{\operatorname{gnin}}\left(2 D_{\max }-1\right)}{(3+\rho) \Delta_{g \max } f_{s}} & \text { for } 0.5<~D_{\max }<~1 \end{array}\right.\)       (22)

\(M=\left\{\begin{array}{cl} \frac{V_{\text {gnin}}\left(1-2 D_{\text {max}}\right) D_{\max }}{(3+\rho) \Delta_{\text {gmax}}\left(1-D_{\text {max}}\right) f_{s}} & \text { for } 0<~D_{\max }<~0.5 \\ \frac{V_{\text {gmin}}\left(2 D_{\max }-1\right)}{(3+\rho) \Delta i_{\text {gnaf}} f_{s}} & \text { for } 0.5<~D_{\max }<~1 \end{array}\right.\)       (23)

where ∆igmax is the maximum input ripple current, which can be expressed as:

\(\Delta i_{g m a x}=\% ripple\cdot I_{g m a x},\)       (24)

where %ripple is the input current ripple at the minimum input voltage and a full load, given in the specifications. In addition, Igmax is the maximum input dc current, which can be written as:

\(I_{gmax }=\frac{P_{omax}}{\eta V_{o}\left(1-D_{max}\right)}.\)       (25)

When Dmax is 0.5, the input current ripple is 0 for any self-inductances or mutual inductances. The inductance matrix cannot be determined.

Step-3: Determine the wire size

The wire area Aw can be determined as:

\(A_{w} \geq \frac{I_{L r m s w t}}{J_{max }}.\)       (26)

With the calculated Aw, a proper wire size can be selected from the wire table.

Step-4: Select the initial core size

The initial core size is selected by using the AP method. In addition, (18) shows the derived AP equation as:

\(A P=\frac{2 \times 10^{4} I_{L r m s w t}\left[\left(L_{s}+\rho M\right) I_{L d c m a x}+\frac{V_{gmin } D_{max }}{2 f_{s}}\right]}{J_{max } B_{max } K_{u}} c m^{4}.\)       (27)

Step-5: Calculate the number of turns

The minimum number of turns is expressed in (15) as:

\(N_{min }=\frac{\left(L_{s}+\rho M\right) I_{L d c m a x}+\frac{V_{gmin } D_{max }}{2 f_{s}}}{B_{max } A_{e o}}.\)       (28)

The actual number of turns N is the next integer value greater than Nmin.

Step-6: Check the window

Check the conductor area with N wires to make sure it fits the area available in the core window, which is shown as follows:

\(N A_{w} \leq K_{u} W_{a}.\)       (29)

If not, the next larger core size should be selected.

Step-7: Calculate the air gap length

The air gap length can be obtained by solving equations (8), (12) and (20) as:

\(l_{g}=\frac{3 N^{2} \mu_{0} A_{e o}}{4 L_{s}}.\)       (30)

IV. DESIGN EXAMPLE

A design example is shown as follows to demonstrate the proposed coupled inductor design method.

Step-1: Specifications given

The specifications are given in Table I.

TABLE I SPECIFICATIONS OF THE 2-PHASE INTERLEAVED BOOST CONVERTER

E1PWAX_2019_v19n2_344_t0001.png 이미지

Step-2: Determine the self and mutual inductances

From (2), the maximum duty cycle of the MOSFET is:

\(D_{max }=1-\frac{18}{48}=0.625.\)

Then the maximum input dc current can be calculated from (25) as:

\(I_{gmax }=\frac{48}{48 \times 97 \% \times(1-0.625)}=2.749 \mathrm{A}.\)

Next, the maximum input ripple current is calculated from (24):

\(\Delta i_{g m a x}=5 \% \times 2.749=0.137 A.\)

Finally, the self and mutual inductances can be obtained from (22) and (23) as:

\(L_{s}=\frac{3 \times 18 \times(2 \times 0.625-1)}{(3-1) \times 0.137 \times 123000}=399 \mu H,\)

\(M=\frac{18 \times(2 \times 0.625-1)}{(3-1) \times 0.137 \times 123000}=133 \mu H.\)

Step-3: Determine the wire size

In the worst case, with the calculated self and mutual inductances, Leq can be given from (5) as:

\(L_{e q}=\frac{(399+133) \times(399-133)}{399-133 \times \frac{1-0.625}{0.625}}=444 \mu H,\)

which means the inductor rms current in the worst case is (from (4)):

\(\begin{aligned} I_{L r m s w t} & \approx \sqrt{\left[\frac{48}{2 \times 97 \% \times 48 \times(1-0.625)}\right]^{2}+\frac{1}{12} \times\left(\frac{18 \times 0.625}{444 \times 10^{-6} \times 123000}\right)^{2}} \\ & \approx 1.375 A . \end{aligned}\)

Jmax is selected as 600 A / cm2. Then the wire size can be determined from (26) as:

\(A_{w} \geq \frac{1.375}{600}=0.0023 \mathrm~{cm}^{2}.\)

From the wire table, a 24 AWG wire size is selected with Aw = 0.0025 cm2.

Step-4: Select the initial core size

The maximum inductor dc current can be calculated from (1) as:

\(I_{L d c m a x}=\frac{48}{2 \times 97 \% \times 48 \times(1-0.625)}=1.375 A.\)

The core material is a ferrite PC40. Thus, Bmax is set as 0.3 T. In addition, Ku is selected as 0.3. Then the area product can be given from (27) as:

\(\begin{aligned} A P &=\frac{2 \times 10^{4} \times 1.375 \times\left[\left(3.99 \times 10^{-4}-1.33 \times 10^{-4}\right) \times 1.375+\frac{18 \times 0.625}{2 \times 123000}\right]}{600 \times 0.3 \times 0.3} \\ &=0.210 \mathrm{cm}^{4}. \end{aligned}\)

An EI25 core is selected with AP = 0.339 cm4 , Aeo = 0.203 cm2 and Wa = 0.772 cm2.

Step-5: Calculate the number of turns

The minimum number of turns is given from (28) as:

\(N_{min }=\frac{\left[\left(3.99 \times 10^{-4}-1.33 \times 10^{-4}\right) \times 1.375+\frac{18 \times 0.625}{2 \times 123000}\right]}{0.3 \times 2.03 \times 10^{-5}}=67.8.\)

Therefore, the actual number of turns is 68.

Step-6: Check the window

The calculated actual number of turns and the selected wire size lead to:

\(N A_{w}=68 \times 0.0025=0.17 \mathrm{cm}^{2}.\)

In addition:

\(K_{u} W_{a}=0.3 \times 0.772=0.23 \mathrm{cm}^{2}.\)

Check the window with (29), 0.17 cm2 < 0.23 cm2, to make sure the EI25 core is a proper size.

Step-7: Calculate the air gap length

The air gap length can be calculated from (30) as:

\(l_{g}=\frac{3 \times 68^{2} \times 4 \pi \times 10^{-7} \times 2.03 \times 10^{-5}}{4 \times 399 \times 10^{-6}}=0.22 \mathrm{mm}.\)

V. SIMULATION AND EXPERIMENTAL RESULTS

Fig. 5 shows the simulation model for a 2-phase interleaved boost converter with a coupled inductor structure in PSIM. The input voltage is 18 V and the output power is 48 W. The simulated inductor current with a gate signal is plotted in Fig. 6(a), and the simulated input current is illustrated in Fig. 6(b). From Fig. 6(b), the simulated input ripple current is about 0.13 A, which has a small difference from the designed value 0.137 A. This is due to the fact that the efficiency of the converter in the simulation is 100 %. The simulated flux densities of the left and right outer legs are shown in Fig. 7, the maximum flux density is about 0.3 T , which satisfies the design very well.

E1PWAX_2019_v19n2_344_f0005.png 이미지

Fig. 5. Simulation model of a 2-phase interleaved boost converter with a coupled inductor structure in PSIM.

E1PWAX_2019_v19n2_344_f0013.png 이미지

Fig. 6. Simulation waveforms. (a) Inductor current with a gate signal (IL(t): inductor current). (b) Input and inductor currents (Ig(t): input current; IL1(t): inductor current of phase 1; IL2(t): inductor current of phase 2).

E1PWAX_2019_v19n2_344_f0014.png 이미지

Fig. 7. Simulated flux densities of the left and right outer legs.

A prototype of a coupled inductor with 68 turns per phase is shown in Fig. 8. By adjusting the air gap length to 0.3 mm, the self and mutual inductances measured with a precision LCR meter are 393 μH and 106 μH, respectively. When compared with the calculated inductances in step-2, the self-inductance has an error of 6 μH and the mutual inductance has an error of 27 μH. This is due to the fact that the air gap length of the coupled inductor during measurements and calculations is different. In addition, the leakage fluxes of the windings leaking into the air are neglected during calculations.

E1PWAX_2019_v19n2_344_f0007.png 이미지

Fig. 8. Prototype of a coupled inductor.

Experimental waveforms of the input and inductor currents are shown in Fig. 9 with a 48 W output power and an 18 V input voltage. The inductor current trend with a gate voltage shown in Fig. 9(a) is similar to that shown in Fig. 6(a). The input and inductor waveforms illustrated in Fig. 9(b) coincide with those sketched in Fig. 6(b). From Fig. 9(b) it can be seen that the measured input ripple current is about 0.14 A, which matches the designed input ripple current in step-2. The measured efficiency of the converter and the inductor temperature with an 18 V input voltage are plotted in Figs. 10 and 11, respectively. Under a full load, the measured efficiency is about 96.3 % and the measured inductor temperature is about 50 °C at room temperature without fan cooling. These measurements also satisfy the design.

E1PWAX_2019_v19n2_344_f0008.png 이미지

Fig. 9. Experimental waveforms. (a) Inductor currents with gate voltages. From bottom to top: trace C1 (inductor current of phase 1), 500 mA / div; trace C2 (inductor current of phase 2), 500 mA / div; trace C3 (gate voltage of MOSFET 1), 10 V / div; trace C4 (gate voltage of MOSFET 2), 10 V / div. Time base: 5 μs / div. (b) Input and inductor currents. From bottom to top: trace C1 (inductor current of phase 1), 500 mA / div; trace C2 (inductor current of phase 2), 500 mA / div; trace C3 (input current), 500 mA / div. Time base: 5 μs / div.

E1PWAX_2019_v19n2_344_f0009.png 이미지

Fig. 10. Measured efficiency of a converter with an 18 V input voltage.

E1PWAX_2019_v19n2_344_f0010.png 이미지

Fig. 11. Measured inductor temperature with an 18 V input voltage.

A prototype of a coupled inductor with desired self and mutual inductances are obtained by using the proposed coupled inductor design method. The desired input current ripple is also obtained from experimental results obtained with the designed prototype. Therefore, the validity of the proposed coupled inductor design method has been confirmed.

VI. CONCLUSIONS

In this paper, a coupled inductor design method for 2-phase interleaved boost converters has been proposed. To select a proper core size, an area product equation is newly derived. At the same time, by using the proposed coupled inductor design method, the wire size, number of turns and air gap length can be determined too. Finally, a design example indicates that the proposed coupled inductor design method is valid.

ACKNOWLEDGMENT

This research was supported by Basic Science Research Program through the National Research Foundation of Korea (NRF) funded by the Ministry of Education (2015R1D1A1A01058167).

APPENDIX

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