DOI QR코드

DOI QR Code

Design of Counter Circuit for Improving Precision in Distance Measuring System

거리 측정 시스템의 정밀도 향상을 위한 카운터 회로의 설계

  • Choi, Jin-Ho (Division of Embedded IT Engineering, Busan University of Foreign Studies)
  • Received : 2020.06.04
  • Accepted : 2020.07.08
  • Published : 2020.07.31

Abstract

In the distance measurement system the time-to-digital conversion circuit used measures the distance using the time interval between the start signal and the stop signal. The time interval is generally converted to digital information using a counter circuit considering the response speed. Therefore, a clock signal with a high frequency is required to improve precision, and a clock signal with a high frequency is also required to measure fine distances. In this paper, a counter circuit was designed to increase the accuracy of distance measurement while using the same frequency. The circuit design was performed using a 0.18㎛ CMOS process technology, and the operation of the designed circuit was confirmed through HSPICE simulation. As a result of the simulation, it is possible to obtain an improvement of four times the precision compared to the case of using a general counter circuit.

거리측정 시스템에서 사용되는 시간-디지털 변환회로는 시작신호와 멈춤신호 사이의 시간 간격을 이용하여 거리를 측정한다. 응답속도를 고려한 시간 간격은 일반적으로 카운터 회로를 이용하여 디지털 정보로 변환한다. 그러므로 정밀도 향상을 위해서는 높은 주파수의 클록 신호가 요구되며, 미세 거리의 측정을 위해서도 높은 주파수의 클록 신호가 필요하다. 본 논문에서는 동일한 주파수를 사용하면서도 거리 측정의 정밀도를 높이기 위한 카운터 회로를 설계하였다. 회로의 설계는 0.18㎛ CMOS 공정을 이용하였으며, 설계된 회로의 동작은 HSPICE 시뮬레이션을 통하여 확인하였다. 시뮬레이션 결과 일반적인 카운터 회로를 사용한 경우에 비해 4배의 향상된 정밀도를 얻을 수 있었다.

Keywords

References

  1. L. Ping, W. Ying and A. Piero, "A 2.2ps 2-D Gated Vernier Time-to-Digital Converter with Digital Calibration," IEEE Transaction. on Circuits and Systems II, pp.1019-1023, March 2016.
  2. G. W. Roberts and M. Ali-Bakhshian, "A brief introduction to time-to-digital and digital-to-time converters," IEEE Trans. on Circuits and Systems II: Express Briefs, vol. 57, no. 3, pp. 153-157, March 2010. https://doi.org/10.1109/TCSII.2010.2043382
  3. S. Henzler, Time-to-Digital Converters, Heidelberg, Springer Netherlands, 2010.
  4. J. Lee and Y. Moon, "The Design of a 0.15ps High Resolution Time-to-Digital Converter," Journal of Semiconductor Technology and Science, vol. 15, no. 3, pp. 334-341, June 2015. https://doi.org/10.5573/JSTS.2015.15.3.334
  5. S. Rana and K. Pal, "Current Conveyor Simulation Circuits Using Operational Amplifiers," Journal of Physical Sciences, vol. 11, pp. 124-132, 2007.
  6. K. B. Maji, R. Kar, D. Mandal and S. P. Ghoshal, "Optimal Design of Low Voltage CMOS Second Generation Current Conveyor Using Hybrid Cuckoo Search and Particle Swarm Optimization Algorithm," in Proceeding of the 2017 Information Conference on Information Technology, Amman, pp. 246-251, Dec. 2017.
  7. M. Brinson and V. Kuznetsov, "Current Conveyor EquationDefined Macromodels for Wideband RF Circuit Design," International Journal of Microelectronics and Computer Science, vol. 8, no. 2, pp. 65-71, 2017.
  8. P. Kumar and K. Pal, "Universe Biquadratic Filter Using a Single Current Conveyor," Journal of Active and passive Electronics Devices, vol. 3, pp. 7-16, 2008.
  9. T. Ettaghzouti, M. Bchir and N. Hassen, "High CMRR Voltage Mode Instrumentation Amplifier Using a New CMOS Differential Difference Current Conveyor Realization," International Journal of Electrical Engineering & Telecommunication, vol. 9, no. 3, pp. 132-141, May 2020.
  10. Anurag, G. Singh and V. Sulochana, "Low Power Dual Edge-Triggered Static D Flip-Flop," International Journal of VLSI design & Communication Systems, vol.4, no.3, pp. 24-29, June 2013.