Journal of Semiconductor Engineering

The Institute of Semiconductor Engineers (반도체공학회)
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On the Hardware Complexity of Tree Expansion in MIMO Detection

  • Kong, Byeong Yong (Division of Electrical, Electronic, and Control Engineering, Kongju National University) ;
  • Lee, Youngjoo (Department of Electrical Engineering, Pohang University of Science and Technology) ;
  • Yoo, Hoyoung (Department of Electronics Engineering, Chungnam National University)
  • Received : 2021.08.27
  • Accepted : 2021.10.04
  • Published : 2021.12.31
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Abstract

This paper analyzes the tree expansion for multiple-input multiple-output (MIMO) detection in the viewpoint of hardware implementation. The tree expansion is to calculate path metrics of child nodes performed in every visit to a node while traversing the detection tree. Accordingly, the tree-expansion unit (TEU), which is responsible for such a task, has been an essential component in a MIMO detector. Despite the paramount importance, the analyses on the TEUs in the literature are not thorough enough. Accordingly, we further investigate the hardware complexity of the TEUs to suggest a guideline for selection. In this paper, we focus on a pair of major ways to implement the TEU: 1) a full parallel realization; 2) a transformation of the formulae followed by common subexpression elimination (CSE). For a logical comparison, the numbers of multipliers and adders are first enumerated. To evaluate them in a more practical manner, the TEUs are implemented in a 65-nm CMOS process, and their propagation delays, gate counts, and power consumptions were measured explicitly. Considering the target specification of a MIMO system and the implementation results comprehensively, one can choose which architecture to adopt in realizing a detector.

Keywords

Acknowledgement

The authors would like to thank the IC Design Education Center (IDEC) of South Korea for supporting electronic design automation (EDA) tools.

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