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Design of Low Noise Amplifier Utilizing Input and Inter Stage Matching Circuits

다양한 매칭 회로들을 활용한 저잡음 증폭기 설계 연구

  • Jo, Sung-Hun (Department of Electronic Engineering, Dongseo University)
  • Received : 2021.04.27
  • Accepted : 2021.05.10
  • Published : 2021.06.30

Abstract

In this paper, a low noise amplifier having high gain and low noise by using input and inter stage matching circuits has been designed. A current-reused two-stage common-source topology is adopted, which can obtain high gain and low power consumption. Deterioration of noise characteristics according to the source inductive degeneration matching is compensated by adopting additional matching circuits. Moreover trade-offs among noise, gain, linearity, impedance matching, and power dissipation have been considered. In this design, 0.18-mm CMOS process is employed for the simulation. The simulated results show that the designed low noise amplifier can provide high power gain and low noise characteristics.

Keywords

Acknowledgement

This work was supported by the Dongseo University Research Fund of 2020. (DSU-20200028)

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