Journal of the Korea Institute of Information and Communication Engineering (한국정보통신학회논문지)

The Korea Institute of Information and Commucation Engineering (한국정보통신학회)
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Lightweight FPGA Implementation of Symmetric Buffer-based Active Noise Canceller with On-Chip Convolution Acceleration Units

온칩 컨볼루션 가속기를 포함한 대칭적 버퍼 기반 액티브 노이즈 캔슬러의 경량화된 FPGA 구현

  • Park, Seunghyun (School of Electronics Engineering, Kyungpook National University) ;
  • Park, Daejin (School of Electronics Engineering, Kyungpook National University)
  • Received : 2022.09.20
  • Accepted : 2022.11.02
  • Published : 2022.11.30
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Abstract

As the noise canceler with a small processing delay increases the sampling frequency, a better-quality output can be obtained. For a single buffer, processing delay occurs because it is impossible to write new data while the processor is processing the data. When synthesizing with anti-noise and output signal, this processing delay creates additional buffering overhead to match the phase. In this paper, we propose an accelerator structure that minimizes processing delay and increases processing speed by alternately performing read and write operations using the Symmetric Even-Odd-buffer. In addition, we compare the structural differences between the two methods of noise cancellation (Fast Fourier Transform noise cancellation and adaptive Least Mean Square algorithm). As a result, using an Symmetric Even-Odd-buffer the processing delay was reduced by 29.2% compared to a single buffer. The proposed Symmetric Even-Odd-buffer structure has the advantage that it can be applied to various canceling algorithms.

처리지연이 적은 노이즈 캔슬러일수록 샘플링 주파수를 높일 수 있으므로 더 좋은 품질의 출력 신호를 얻을 수 있다. 단일 버퍼를 사용할 경우 프로세서가 입력된 데이터를 처리하는 동안 새로운 데이터를 버퍼에 쓰기가 불가능하므로 처리지연이 발생한다. 이러한 처리지연은 안티-노이즈와 출력 신호를 합성시킬 때 위상을 일치시키기 위한 추가적인 버퍼링 오버헤드를 발생시킨다. 본 논문에서는 대칭적 Even-Odd-buffer 구조를 사용하여 읽기와 쓰기 작업을 번갈아 가며 수행함으로써 처리지연을 최소화하고 처리속도를 높일 수 있는 가속기의 구조를 제안한다. 또한, Fast Fourier Transform 기반 노이즈 캔슬링과 적응 Least Mean Square 알고리즘을 사용한 노이즈 캔슬링의 구조적 차이를 비교한다. 그 결과로 대칭적 Even-Odd-buffer를 사용하였을 때 단일 버퍼 대비 처리지연이 29.2% 줄어들었다. 제안하는 대칭적 Even-Odd-buffer 구조는 다양한 노이즈 캔슬링 알고리즘에 적용될 수 있다는 장점이 있다.

Keywords

Acknowledgement

This study was supported by the BK21 FOUR project funded by the Ministry of Education, Korea (4199990113966), and the Basic Science Research Program through the National Research Foundation of Korea (NRF) funded by the Ministry of Education (NRF-2018R1A6A1A03025109, 10%, NRF-2022R1I1A3069260, 20%) and by Ministry of Science and ICT (2020M3H2A1078119). This work was partly supported by an Institute of Information and communications Technology Planning and Evaluation (IITP) grant funded by the Korean government (MSIT) (No. 2021-0-00944, Metamorphic approach of unstructured validation/verification for analyzing binary code, 40%) and (No. 2022-0-00816, OpenAPI-based hw/sw platform for edge devices and cloud server, integrated with the on-demand code streaming engine powered by AI, 20%) and (No. 2022-0-01170, PIM Semiconductor Design Research Center, 10%). The EDA tool was supported by the IC Design Education Center (IDEC), Korea.

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