A Study on New Digital In this paper, we propose a new Angular Form Carrier Recovery Loop(AFCR loop) for PSK modulation technique. AF CR loop includes detected angle symbol and Multi Level Hardlimiter. Using zero crossing DPLL, we model 1st 2nd AF CR loop, and also derive SCurve. In order to prove steady state operation of AF CR loop, we evaluate performance of this loop by Monte-Carlo and analytical simulation method. We also compare the performance of AF CR loop to that of other loop in terms of acquisition, S-Curve, and RMS jitter. From the comparison result, we verify that the performance of AF CR loop operates well in steady state.

In this paper, the asymtotic performance of a multiple trellis coded differential MPSK modulation over a satellite land mobile communication channel characterized by additive white Gaussian noise (AWGN) and fading is presented. Simple formulas for the bit error probability are derived for systems using differential MTCM over Rician and Rayleigh fading channel. Also are given numerical results which are more indicative of the actual system performance. Finally, the comparisons with results previously obtained for the uncoded and conventional trellis coded modulation are provided.

Decoding algorithm of noncyclic Reed-Solomon codes consists of four steps which are to compute syndromes, to find error-location polynomial, to decide error-location, and to solve error-values. There is a decoding method by which the computation of both error-location polynomial and error-evaluator polynimial can be avoided in conventional decoding methods using Euclid algorithm. The disadvantage of this method is that the same amount of computation is needed that is equivalent to solve the avoided polynomial. This paper considers the division method on polynomial on GF(2$^{m}$) systematically. And proposes a novel method to find error correcting polynomial by simple mathematical expression without the same amount of computation to find the two avoided polynomial. Especially. proposes the method which the amount of computation to find F (x) from the division M(x) by x, (x-1),....(x--${\alpha}^{n-2}$) respectively can be avoided. By applying the simple expression to decoding procedure on RS codes, propses a new decoding algorithm, and to show the validity of presented method, computer simulation is performed.

For an economical or timely reason, the types of subscriber loops for ISDN basic rate access service will, at least initially, be that of the pre-existing telephone network, that is, 2-wire twisted-pair metallic cable. Therefore, it is important to assess the high-speed digital transmission capability of the 2-wire subscriber loops. In this paper, the impairments such as intersymbol interference, crosstalk, and impulse niose are modeled. And then, symbol error probabilities in terms of SNR in DSL system using ECH and 2B1Q line code are analytically derived and numerically calculated. Also, the relationship between the quality of service required in ISDN subscriber section and the loop parameters is investigated.

In this paper, a method for analyzing coaxial collinear antenna for base station of mobile communications using the moment method and the transmission line theory is presented. The excited voltages at the junctions between elements are expressed as the matrix with transmission parameters and these voltages are applied to the integral equation for calculating current distribution. Here, the current distributions, input admittances, radiation patterns and gains are calculated. Calculated values of the current distributions and the input admittances show good agreement with measured values. In case of beamtilted collinear antenna, radiation pattern is simialar to measured result except side lobe.

The ANSI recently adopted normalized site attenuation(NSA) as a validation procedure of open area test sites. In this paper, the theoretical NSA values specified in the truth vlues of NSA were calculated for an ideal test site when tuned dipoles are used. A method of moments technique is employed to evaluate these NSA values. The calculated NSA values are more accurate than that of the ANSI.

The Ku-band GaAs MESFET mixer is designed and implemented using the LINMIC+, the microwave CAD simulator. The RF and IF is 14.0GHz and 1.0GHz, respectively. P$_{LO}$ is 0dBm, it can be obtained 5.8dB of the minimum noise figure at 1.4GHz and 5.8dB of the maximum conversion gain at 1.45GHz. Effects of bias and power level of local oscillator frequency are observed and the characteristics are verified.

In this paper, the fields of double-plane steps in rectangular waveduides are analyzed using the modified TE$_{mn}$$^{x}$ mode-matching method. The characteristics of rectangular waveguide having double-plane steps are investigated with accomdating the effects of higher-order modes generated by discontinuities. In comparison with the generalized TE$_{mn}$-TM$_{mn}$ mode analysis, the modified TE$_{mn}$$^{x}$ mode-matching method consumes less memory and CPU time and provides improved convergence behavior. The results obtained in this manner coinside with that of the TE$_{mn}$-TM$_{mn}$ mode-matching method.

In this paper, the effective permittivity in the piezoelectric material is numerically obtained and greens function is derived from that. It is shown that the admittance and the transfer function of an interdigital transducer is represented by electrostatic charge distribution using Quasi-static approximation. To prove the validity of the quasi-static approximation, numerical results for the uniform IDT of a filter mounted on 128 $^{\circ}$ rotated Y-cut X-propagating Lithium Niobate are compared with the measured ones.

We analyzed the D.I. water used in wet cleaning process of semiconductor device manufacturing both at the D.I. water plant and at the wafer cleaning bath to detect the impurity source of D.I. water contamination. This shows that the quantity of impurity is related to the resistivity of D.I. water, and we found that the cleanliness of the wafer surface processed in D.I. water bath was affected by the degree of the ionic impurity contamination. So we evaluated the cleaning effect as different method for Fe ion, having the best adsoptivity on wafer surface. Moreover the temperature effect of the D.I. water is investigated in case of anion in order to remove the chemical residue after wet process. In addition to the control of D.I. water resistivity, chemical analysis of impurity control in D.I. water should be included and a suitable cleaning an drinsing method needs to be investigated for a high yielding semiconductor device.

Oxide and reoxidized-nitrided-oxide were formed by furnace oxidation and rapid thermal processing (RTP). MOS capacitor and n-MOSFET's with those films as gate insulators were fabricated. The electrical characteristics of insulators were evaluated by current-voltage, high-frequency capacitance-voltage (C-V), and time-dependent dielectrical breakdown (TDDB) measurements. The hot carrier effects of MOSFET's were also investigated. Time-dependent dielectrical breakdown (TDDB) characteristics show that the life time of reoxidized-nitrided-oxide films is about 3 times longer than that of oxides. Hot carrier effects reveal that the life time of MOSFET's with reoxidized-nitrided-oxides is about 3 times longer than that of MOSFET's with oxides. Therefore, it is found that the reliability of dielectric films estimated by the hot carrier effects of MOSFET's is consistent with that of dielectric films from TDDB method.

In the formation of the shallow p$^{+}$-n junction, the preamorphization method by As$^{+}$ ions was applied in order to avoid the boron channeling effect which is occured during the B$^{+}$ implantation especially with low energy. By As$^{+}$ pre-implant with 60KeV energy and 2*10$^{14}$ cm$^{-2}$ dose, the channelinf of B$^{+}$ ions implanted with 10keV/1.5*10$^{14}$ cm$^{-2}$ can be avoded completely. After the RTA of 1050.deg. C and 10sec, the junction depth was 0.14.mu.m, the leakage current was 20nA/cm$^{2}$(at-5V bias) and the sheet resistance was 107.OMEGA./ㅁ. And the preamorphized Si layer was changed into the perfect crystal si after the RTA.r the RTA.

In this paper, we have developed a submicron Si MOSFET simulator, which is physically based on the hydrodynamic energy transport mode. The simulator was used to investigate the nonstationary transport effects and the transient phenomena in submicron Si MOSFET's. It is found that the velocity overshoot and the carrier heating are dominant transport mechanism near the drain end of the channel and the transient phenomena is more retained in a long channel MOSFET.

This paper presents a new performance-driven multi-levelizer which transforms a two-level description into a boolean network of the multilevel structure satisfied with user's costraints, such as chip area, the number of wires and literals, maximum delay, function level, fanin, fanout, etc.. The performance of circuits is estimated by reference to the informations in cell library through the cell mapping phase, and multi-levelization of circuits is constructed by the decomposition using the kernel and factoring concepts. Here, the saving cost of a common subexpression is defined to the sum of area and delay saved, when it is substituted. The experiments with MCNC benchmarks show the efficiency of the proposed method.

High Integration ratio of CMOS circuits incredily increases the test cost during the design and fabrication processes because of the FET fault(Stuck-on faults and Stuck-off faults) which are due to the operational characteristics of CMOS circuits. This paper proposes a test generation algorithm for an arbitrarily large CMOS circuit, which can unify the test steps during the design and fabrication procedure and be applied to both static and dynaic circuits. This algorithm uses the logic equations set for the subroutines resulted from arbitrarily dividing the full circuit hierarchically or horizontally. Also it involves a driving procedure from output stage to input stage, in which to drive a test set corresponding to a subcircuit, only the subcircuits connected to that to be driven are used as the driving resource. With this algorithm the test cost for the large circuit such as VLSI can be reduced very much.